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Djsarkar
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2020/10/16 19:50:07 (permalink)
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PIC18F45K80 SPI initialization setting

Hi,
I am planning to use SPI module of PIC18F45K80. I am reading datasheet to understand SPI operation.
 
SSPSTAT: MSSP STATUS REGISTER (SPI MODE) 
SMP = 0 ; //SPI Master mode: Input data is sampled at the middle of data output time
CKE = 1;  //SPI Slave mode: Transmit occurs on transition from active to Idle clock state
D/A = 0 // Data/Address bit : Used in I2C™ mode only.
P= 0; // Stop bit: Used in I2C mode only.
S = 0 // Start bit : Used in I2C mode only.
R/W = 0; // Read/Write Information bit : Used in I2C mode only.
UA = 0; // Update Address bit : Used in I2C mode only.
BF = 0;  // Buffer Full Status bit (Receive mode only) : Receive is not complete, SSPBUF is empty
 
SPI operates by exchanging data between two devices simultaneously.. one is the master device, the other is the slave device
 
I do not understand following three bits in MSSP STATUS REGISTER
 
What's SMP ? What happen when its set and What happen when Its cleared ?
What happen when CKE is set and What happen when CKE cleared ?
What happen when BF is set and What happen when BF cleared ?
#1

52 Replies Related Threads

    1and0
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    Re: PIC18F45K80 SPI initialization setting 2020/10/16 20:20:42 (permalink)
    +1 (1)
    Djsarkar
    What's SMP ? What happen when its set and What happen when Its cleared ?

    Just like the description said, it selects where the input data is sampled at.
     

    What happen when CKE is set and What happen when CKE cleared ?

    Again, as the description said, it selects what transition transmit occurs.
     

    What happen when BF is set and What happen when BF cleared ?

    Again, as the description said, it is the status of the SSPBUF register.
     
    There should be a SPI waveform figure in your PIC datasheet, study it. ;) The various bits control the mode of waveform it will interface with.
     
    #2
    ric
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    Re: PIC18F45K80 SPI initialization setting 2020/10/16 20:27:13 (permalink)
    +1 (1)
    You don't mention if you will be acting as Master, or as Slave. It matters very much!
     
    My copy of the data sheet says this about SMP

    SMP: Sample bit
    SPI Master mode:
    1 = Input data is sampled at the end of data output time
    0 = Input data is sampled at the middle of data output time
    SPI Slave mode:
    SMP must be cleared when SPI is used in Slave mode

    and "FIGURE 21-3: SPI MODE WAVEFORM (MASTER MODE)" graphically shows what this means.
     

    CKE: SPI Clock Select bit(1)
    1 = Transmit occurs on transition from active to Idle clock state
    0 = Transmit occurs on transition from Idle to active clock state

     
    BF is a read only status bit, you cannot write to it. I seem to keep pointing this out to you. It is in the datasheet...

    BF: Buffer Full Status bit (Receive mode only)
    1 = Receive is complete, SSPBUF is full
    0 = Receive is not complete, SSPBUF is empty


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    #3
    Djsarkar
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    Re: PIC18F45K80 SPI initialization setting 2020/10/16 20:36:56 (permalink)
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    ric
    You don't mention if you will be acting as Master, or as Slave. It matters very much!

    Hi ric
    I am planning to measured room  temperature  using J  type thermocouple and MCP3008 ADC. ADC will send data to PIC so I think PIC18F45k80 will be slave and MCP3008 will be master  
     
    #4
    ric
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    Re: PIC18F45K80 SPI initialization setting 2020/10/16 20:46:22 (permalink)
    +1 (1)
    Djsarkar
    ADC will send data to PIC so I think PIC18F45k80 will be slave and MCP3008 will be master  

    Bad guess.
    Master/slave has nothing to do with the direction of data flow.
    That ADC is a slave device. You act as a Master to talk to it.
    As you mentioned in your first post, SPI involves simultaneous data transfers from Master to Slave and Slave to Master.
     

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    #5
    Djsarkar
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    Re: PIC18F45K80 SPI initialization setting 2020/10/16 21:02:47 (permalink)
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    ric
    Bad guess.
    Master/slave has nothing to do with the direction of data flow.
    That ADC is a slave device. You act as a Master to talk to it.
    As you mentioned in your first post, SPI involves simultaneous data transfers from Master to Slave and Slave to Master.

    ric Thanks for the correction 
     
    I am using 20 Mhz external oscillator. SPI is operating in master mode. What should be select from the following option?
     
    SSPM<3:0>: Master Synchronous Serial Port Mode Select bits(3)
    1010 = SPI Master mode: clock = FOSC/8
    0101 = SPI Slave mode: clock = SCK pin; SS pin control disabled; SS can be used as I/O pin
    0100 = SPI Slave mode: clock = SCK pin; SS pin control enabled
    0011 = SPI Master mode: clock = TMR2 output/2
    0010 = SPI Master mode: clock = FOSC/64
    0001 = SPI Master mode: clock = FOSC/16
    0000 = SPI Master mode: clock = FOSC/4
     
    This allows a maximum data rate (at 64 MHz) of
    16 Mbps.
     
    0010 = SPI Master mode: clock = FOSC/64
    post edited by Djsarkar - 2020/10/16 21:04:29
    #6
    1and0
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    Re: PIC18F45K80 SPI initialization setting 2020/10/16 21:15:14 (permalink)
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    Djsarkar
    I am using 20 Mhz external oscillator. SPI is operating in master mode. What should be select from the following option?
     
    SSPM<3:0>: Master Synchronous Serial Port Mode Select bits(3)
    1010 = SPI Master mode: clock = FOSC/8
    0101 = SPI Slave mode: clock = SCK pin; SS pin control disabled; SS can be used as I/O pin
    0100 = SPI Slave mode: clock = SCK pin; SS pin control enabled
    0011 = SPI Master mode: clock = TMR2 output/2
    0010 = SPI Master mode: clock = FOSC/64
    0001 = SPI Master mode: clock = FOSC/16
    0000 = SPI Master mode: clock = FOSC/4

    Obviously it will be a master mode. Check your ADC datasheet to see what max clock frequency it will work at.
    #7
    ric
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    Re: PIC18F45K80 SPI initialization setting 2020/10/16 21:18:57 (permalink)
    0
    Page#4 of the ADC datasheet says the maximum clock rate is:
    VDD=2.7V => 1.35 MHz
    VDD=5V => 3.6 MHz
     

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    #8
    Djsarkar
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    Re: PIC18F45K80 SPI initialization setting 2020/10/16 21:41:00 (permalink)
    0
    as I know that master and slave should be operate in same speed for SPI communication. PIC is running with 20 MHz speed  so if ADC is operating with 3.6 MHz
    20Mhz/5.7 = 3.5 Mhz
    Where to set PIC clock for 3.5 MHz ?
    #9
    1and0
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    Re: PIC18F45K80 SPI initialization setting 2020/10/16 21:54:30 (permalink)
    0 (2)
    Djsarkar
    as I know that master and slave should be operate in same speed for SPI communication. PIC is running with 20 MHz speed  so if ADC is operating with 3.6 MHz
    20Mhz/5.7 = 3.5 Mhz
    Where to set PIC clock for 3.5 MHz ?

    Oh, com'on, you have only the choices given in your Post #6.!!!
    #10
    Djsarkar
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    Re: PIC18F45K80 SPI initialization setting 2020/10/16 22:13:44 (permalink)
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    1and0Oh, com'on, you have only the choices given in your Post #6.!!!

    we have choices
    20/4 = 5 Mhz
    20/8 = 2.5 MHz
    20/16 = 1.25 Mhz
    20/64 = 0.3 MHz
     
     
    consider for  1.35 MHz, 20/16 = 1.25 Mhz should be suitable 
    so SPI bus will operate at 1.25 MHz speed 
     
    as same 
     
    consider for  3.6 MHz, 20/8 = 2.5 Mhz should be suitable 
    so SPI bus will operate at 2.5 MHz speed 
     
    so I guess I have to select this sequence of bits  1010 = SPI Master mode: clock = FOSC/8
    #11
    Djsarkar
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    Re: PIC18F45K80 SPI initialization setting 2020/10/17 04:12:50 (permalink)
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    vexorg
    What's wrong with the onboard ADC?
     To be honest you could clock the SPI at 1Hz, the temperature aint going to change that much over time.


    Hi vexorg
    I don't see any ADC module on board. do you mean inbuilt ADC in PIC18F45K80 
    Here is my routine to Initialize SPI

     
    void Port_Initialized (void)
    {
        ANCON0 = 0; // Set to digital port
        ANCON1 = 0; // Set to digital port
        CM1CON = 0; // Comparator off
        CM2CON = 0; // Comparator off
        ADCON0 = 0; // A/D conversion Disabled
        ADCON1 = 0; // A/D conversion Disabled
        ADCON2 = 0; // A/D conversion Disabled
       
        LATA =  0;  //Make all PORTA pins low
        LATB =  0;  //Make all PORTB pins low
        LATC =  0;  //Make all PORTC pins low
        LATD =  0;  //Make all PORTD pins low
        LATE =  0;  //Make all PORTE pins low
       
        TRISA = 0b0000000; // Slave Select (SS) ? RA5/AN4/C2INB/
        TRISB = 0b0000000; // all are output, Unused
       
        //Serial Data Out (SDO) ? RC5/SDO,
        //Serial Data In (SDI) ? RC4/SDA/SDI
        //Serial Clock (SCK) ? RC3/REF0/SCL/SCK
        TRISC = 0b00010000;
        TRISD = 0b0000000; //all are output, Unused
        TRISE = 0b0000000; // All are output, Unused
    }
    void SPI_Init_Master()
    {
        SSPSTAT = 0b01000000; 
       
        // SMP = 0 SPI Master mode: Input data is sampled at the middle of data output time
        // CKE = 1 SPI Slave mode: Transmit occurs on transition from active to Idle clock state
        // D/A = 0  Data/Address bit : Used in I2C? mode only.
        // P = 0  Stop bit: Used in I2C mode only.
        // S = 0  Start bit : Used in I2C mode only.
        // R/W = 0 Read/Write Information bit : Used in I2C mode only.
        // UA = 0 Update Address bit : Used in I2C mode only.
        // BF = 0  // Buffer Full Status bit (Receive mode only) : Receive is not complete, SSPBUF is empty
       
        SSPCON1=0b00011010; // 
       
        // WCOL = 0 Write Collision Detect bit : No collision
        // SSPOV = 0 Receive Overflow Indicator bit(1) :No overflow
        // SSPEN = 0  Disables the serial port and configures these pins as I/O port pins
        // CKP = 1 Clock Polarity Select bit : Idle state for clock is a high level
        // SSPM<3:0> 1010 = SPI Master mode: clock = FOSC/8
    }

    #12
    Aussie Susan
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    Re: PIC18F45K80 SPI initialization setting 2020/10/18 19:00:22 (permalink)
    0
    Personally I don't like setting the status registers with 'magic numbers' even if you do add comments as to what SHOULD be set in the register. In your case you have repeatedly got a comment wrong: CKE does NOT have anything to do with master or slave mode.
    The compiler provides you with a very good way to set the various field values that makes it very reliable to set exactly what you want. (For example "SSPSTATbits.CKE=1;".) It also means you don't try to set read-only bits (although that will not do any harm) or its that don't have anything to do with the mode you have selected.
    One thing you may not understand is that the SPI master sets the clock rate that is sent to the slave via the SCK signal. This is largely independent of the oscillator or CPU frequency or either the master or the slave. A key design criteria is the maximum clock rate that both the master and slave can handle - these will be given in the data sheets for both devices.
    There is often no need to run an SPI interface at its maximum speed. For your MCU you only have 4 options but which you chose needs to also depend on the maximum speed of the slave device's interface.
    Another thing you need to get right is the CKP and CKE bits. You will need to look at the data sheet for the slave to find out which  clock transition (rising or falling) it samples the MOSI line (also called the SDO line on the PIC devices). Then look at the transition diagrams in the MCU data sheet (for your MCU it is Figure 21-3) and select the CKP/CKE combination that matches what the slave requires. (A trap for young players is that some data sheets refer to an "SPI Mode" such as "SPI Mode 1" - there is a relationship between the 'SPI Mode' and the CKP/CKE settings but it is not obvious and not what you might assume.)
    Finally you should look at the slave data sheet for which SCK transition (again rising or falling) where it has stable data on the MISO (or SDI) signal and set the SMP bit accordingly.
    I don't see it in any of your code but I strongly recommend you use the \SS\ (or \CS\ or whatever else the 'chip select' signal is called). One problem that SPI exchanges have is any noise on the SCK line will get the master and the slave out of sync. Using the \SS\ signal at the start of the exchanges and raising it again at the end will ensure that you start off wth the interfaces synchronised.
    Susan
    #13
    ric
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    Re: PIC18F45K80 SPI initialization setting 2020/10/18 19:17:51 (permalink)
    0
    Hi Susan,
    I agree with all your points except this one:
    Aussie Susan
    ...
    There is often no need to run an SPI interface at its maximum speed. For your MCU you only have 4 options but which you chose needs to also depend on the maximum speed of the slave device's interface.

    Agree that there's no need to use the maximum.
    However, there are five options for SCLK rate.
    • Fosc/4
    • Fosc/8
    • Fosc/16
    • Fosc/64
    • TMR2 output/2
    and that fifth option can generate many different rates.
     

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    #14
    Djsarkar
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    Re: PIC18F45K80 SPI initialization setting 2020/10/18 19:38:56 (permalink)
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    Hi ric & Susan
    okay so I have just written further routine and I just want to go step by step. my first goal is check if my routines are correct or there is any mistake. so I think I need one more routine for ADC conversion   
     

     
    // PIC18F45K80 Configuration Bit Settings

     

    #define _XTAL_FREQ 20000000

     
    // CONFIG1L
    #pragma config RETEN = ON       // VREG Sleep Enable bit (Ultra low-power regulator is Enabled (Controlled by SRETEN bit))
    #pragma config INTOSCSEL = LOW  // LF-INTOSC Low-power Enable bit (LF-INTOSC in Low-power mode during Sleep)
    // SOSCSEL = No Setting
    #pragma config XINST = OFF      // Extended Instruction Set (Disabled)

     
    // CONFIG1H
    #pragma config FOSC = HS2        //  HS oscillator (high power, 16 MHz-25 MHz
    #pragma config PLLCFG = OFF     // PLL x4 Enable bit (Disabled)
    #pragma config FCMEN = OFF      // Fail-Safe Clock Monitor (Disabled)
    #pragma config IESO = OFF       // Internal External Oscillator Switch Over Mode (Disabled)

     
    // CONFIG2L
    #pragma config PWRTEN = ON      // Power Up Timer (Enabled)
    #pragma config BOREN = OFF      // Brown Out Detect (Disabled in hardware, SBOREN disabled)
    #pragma config BORV = 0         // Brown-out Reset Voltage bits (3.0V)
    #pragma config BORPWR = LOW     // BORMV Power level (BORMV set to low power level)

     
    // CONFIG2H
    #pragma config WDTEN = OFF      // Watchdog Timer (WDT disabled in hardware; SWDTEN bit disabled)
    #pragma config WDTPS = 1        // Watchdog Postscaler (1:1)

     
    // CONFIG3H
    #pragma config CANMX = PORTC    // ECAN Mux bit (ECAN TX and RX pins are located on RC6 and RC7, respectively)
    #pragma config MSSPMSK = MSK5   // MSSP address masking (5 bit address masking mode)
    #pragma config MCLRE = OFF      // Master Clear Enable (MCLR Disabled, RE3 Enabled)

     
    // CONFIG4L
    #pragma config STVREN = OFF     // Stack Overflow Reset (Disabled)
    #pragma config BBSIZ = BB1K     // Boot Block Size (1K word Boot Block size)

     
    // CONFIG5L
    #pragma config CP0 = ON         // Code Protect 00800-01FFF (Enabled)
    #pragma config CP1 = ON         // Code Protect 02000-03FFF (Enabled)
    #pragma config CP2 = ON         // Code Protect 04000-05FFF (Enabled)
    #pragma config CP3 = ON         // Code Protect 06000-07FFF (Enabled)

     
    // CONFIG5H
    #pragma config CPB = ON         // Code Protect Boot (Enabled)
    #pragma config CPD = ON         // Data EE Read Protect (Enabled)

     
    // CONFIG6L
    #pragma config WRT0 = ON        // Table Write Protect 00800-01FFF (Enabled)
    #pragma config WRT1 = ON        // Table Write Protect 02000-03FFF (Enabled)
    #pragma config WRT2 = ON        // Table Write Protect 04000-05FFF (Enabled)
    #pragma config WRT3 = ON        // Table Write Protect 06000-07FFF (Enabled)

     
    // CONFIG6H
    #pragma config WRTC = ON        // Config. Write Protect (Enabled)
    #pragma config WRTB = ON        // Table Write Protect Boot (Enabled)
    #pragma config WRTD = ON        // Data EE Write Protect (Enabled)

     
    // CONFIG7L
    #pragma config EBTR0 = ON       // Table Read Protect 00800-01FFF (Enabled)
    #pragma config EBTR1 = ON       // Table Read Protect 02000-03FFF (Enabled)
    #pragma config EBTR2 = ON       // Table Read Protect 04000-05FFF (Enabled)
    #pragma config EBTR3 = ON       // Table Read Protect 06000-07FFF (Enabled)

     
    // CONFIG7H
    #pragma config EBTRB = ON       // Table Read Protect Boot (Enabled)

     
    // #pragma config statements should precede project file includes.
    // Use project enums instead of #define for ON and OFF.

     
    #include <xc.h>

     

    #define TRUE                  1

     

    void Port_Initialized (void)
    {
        ANCON0 = 0; // Set to digital port
        ANCON1 = 0; // Set to digital port
        CM1CON = 0; // Comparator off
        CM2CON = 0; // Comparator off
        ADCON0 = 0; // A/D conversion Disabled
        ADCON1 = 0; // A/D conversion Disabled
        ADCON2 = 0; // A/D conversion Disabled
       
        LATA =  0;  //Make all PORTA pins low
        LATB =  0;  //Make all PORTB pins low
        LATC =  0;  //Make all PORTC pins low
        LATD =  0;  //Make all PORTD pins low
        LATE =  0;  //Make all PORTE pins low
       
        TRISA = 0b0000000; // Slave Select (SS)  RA5/AN4/C2INB/
        TRISB = 0b0000000; // all are output, Unused
       
        //Serial Data Out (SDO)  RC5/SDO,
        //Serial Data In (SDI)  RC4/SDA/SDI
        //Serial Clock (SCK)  RC3/REF0/SCL/SCK
        TRISC = 0b00010000;
        TRISD = 0b0000000; //all are output, Unused
        TRISE = 0b0000000; // All are output, Unused
    }

     

    void SPI_Init_Master()
    {
        SSPSTAT = 0b01000000; // SSPSTAT: MSSP STATUS REGISTER (SPI MODE)  SMP=0, CKE=1
       
        // SMP = 0 SPI Master mode: Input data is sampled at the middle of data output time
        // CKE = 1 SPI Slave mode: Transmit occurs on transition from active to Idle clock state
        // D/A = 0  Data/Address bit : Used in I2C? mode only.
        // P = 0  Stop bit: Used in I2C mode only.
        // S = 0  Start bit : Used in I2C mode only.
        // R/W = 0 Read/Write Information bit : Used in I2C mode only.
        // UA = 0 Update Address bit : Used in I2C mode only.
        // BF = 0  // Buffer Full Status bit (Receive mode only) : Receive is not complete, SSPBUF is empty
       
        SSPCON1=0b00100010; // SSPEN=0, CKP=1,SSPM=0010(Master Fosc/64)
       
        // WCOL = 0 Write Collision Detect bit : No collision
        // SSPOV = 0 Receive Overflow Indicator bit(1) :No overflow
        // SSPEN = 1 
        // CKP = 0  Clock Idle Low, Active High
        // SSPM<3:0> 0010 = SPI Master Mode Fosc/64
    }

     
    unsigned char SPI_Write(unsigned char Sendchar)
    {
      unsigned char Receivechar;
      while (!BF);
      Receivechar = SSPBUF;
      SSPBUF = Sendchar;
      return Receivechar;
    }

     
     
    void main(void)

        Port_Initialized();
        SPI_Init_Master();
       
        while (1)
        {
       
        }
       
    }

     

    post edited by Djsarkar - 2020/10/18 19:40:03
    #15
    ric
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    Re: PIC18F45K80 SPI initialization setting 2020/10/18 19:54:25 (permalink)
    0
    Your SPI_write routine (which you never call) is bad. You must do the write first to trigger the transfer, check BF to detect when the transfer has completed. Only then can you read the received data.
    Your version seems to be taken from some slave code, not master.

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    #16
    Djsarkar
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    Re: PIC18F45K80 SPI initialization setting 2020/10/18 22:56:48 (permalink)
    0
    ric
    Your SPI_write routine (which you never call) is bad. You must do the write first to trigger the transfer, check BF to detect when the transfer has completed. Only then can you read the received data.
    Your version seems to be taken from some slave code, not master.

    modified version of code. I am sending three dummy bytes.  


    // PIC18F45K80 Configuration Bit Settings


    #define _XTAL_FREQ 20000000

    // CONFIG1L
    #pragma config RETEN = ON       // VREG Sleep Enable bit (Ultra low-power regulator is Enabled (Controlled by SRETEN bit))
    #pragma config INTOSCSEL = LOW  // LF-INTOSC Low-power Enable bit (LF-INTOSC in Low-power mode during Sleep)
    // SOSCSEL = No Setting
    #pragma config XINST = OFF      // Extended Instruction Set (Disabled)

    // CONFIG1H
    #pragma config FOSC = HS2        //  HS oscillator (high power, 16 MHz-25 MHz
    #pragma config PLLCFG = OFF     // PLL x4 Enable bit (Disabled)
    #pragma config FCMEN = OFF      // Fail-Safe Clock Monitor (Disabled)
    #pragma config IESO = OFF       // Internal External Oscillator Switch Over Mode (Disabled)

    // CONFIG2L
    #pragma config PWRTEN = ON      // Power Up Timer (Enabled)
    #pragma config BOREN = OFF      // Brown Out Detect (Disabled in hardware, SBOREN disabled)
    #pragma config BORV = 0         // Brown-out Reset Voltage bits (3.0V)
    #pragma config BORPWR = LOW     // BORMV Power level (BORMV set to low power level)

    // CONFIG2H
    #pragma config WDTEN = OFF      // Watchdog Timer (WDT disabled in hardware; SWDTEN bit disabled)
    #pragma config WDTPS = 1        // Watchdog Postscaler (1:1)

    // CONFIG3H
    #pragma config CANMX = PORTC    // ECAN Mux bit (ECAN TX and RX pins are located on RC6 and RC7, respectively)
    #pragma config MSSPMSK = MSK5   // MSSP address masking (5 bit address masking mode)
    #pragma config MCLRE = OFF      // Master Clear Enable (MCLR Disabled, RE3 Enabled)

    // CONFIG4L
    #pragma config STVREN = OFF     // Stack Overflow Reset (Disabled)
    #pragma config BBSIZ = BB1K     // Boot Block Size (1K word Boot Block size)

    // CONFIG5L
    #pragma config CP0 = ON         // Code Protect 00800-01FFF (Enabled)
    #pragma config CP1 = ON         // Code Protect 02000-03FFF (Enabled)
    #pragma config CP2 = ON         // Code Protect 04000-05FFF (Enabled)
    #pragma config CP3 = ON         // Code Protect 06000-07FFF (Enabled)

    // CONFIG5H
    #pragma config CPB = ON         // Code Protect Boot (Enabled)
    #pragma config CPD = ON         // Data EE Read Protect (Enabled)

    // CONFIG6L
    #pragma config WRT0 = ON        // Table Write Protect 00800-01FFF (Enabled)
    #pragma config WRT1 = ON        // Table Write Protect 02000-03FFF (Enabled)
    #pragma config WRT2 = ON        // Table Write Protect 04000-05FFF (Enabled)
    #pragma config WRT3 = ON        // Table Write Protect 06000-07FFF (Enabled)

    // CONFIG6H
    #pragma config WRTC = ON        // Config. Write Protect (Enabled)
    #pragma config WRTB = ON        // Table Write Protect Boot (Enabled)
    #pragma config WRTD = ON        // Data EE Write Protect (Enabled)

    // CONFIG7L
    #pragma config EBTR0 = ON       // Table Read Protect 00800-01FFF (Enabled)
    #pragma config EBTR1 = ON       // Table Read Protect 02000-03FFF (Enabled)
    #pragma config EBTR2 = ON       // Table Read Protect 04000-05FFF (Enabled)
    #pragma config EBTR3 = ON       // Table Read Protect 06000-07FFF (Enabled)

    // CONFIG7H
    #pragma config EBTRB = ON       // Table Read Protect Boot (Enabled)

    // #pragma config statements should precede project file includes.
    // Use project enums instead of #define for ON and OFF.

    #include <xc.h>


    #define TRUE                  1


    void Port_Initialized (void)
    {
        ANCON0 = 0; // Set to digital port
        ANCON1 = 0; // Set to digital port
        CM1CON = 0; // Comparator off
        CM2CON = 0; // Comparator off
        ADCON0 = 0; // A/D conversion Disabled
        ADCON1 = 0; // A/D conversion Disabled
        ADCON2 = 0; // A/D conversion Disabled
       
        LATA =  0;  //Make all PORTA pins low
        LATB =  0;  //Make all PORTB pins low
        LATC =  0;  //Make all PORTC pins low
        LATD =  0;  //Make all PORTD pins low
        LATE =  0;  //Make all PORTE pins low
       
        TRISA = 0b0000000; // Slave Select (SS)  RA5/AN4/C2INB/
        TRISB = 0b0000000; // all are output, Unused
       
        //Serial Data Out (SDO)  RC5/SDO,
        //Serial Data In (SDI)  RC4/SDA/SDI
        //Serial Clock (SCK)  RC3/REF0/SCL/SCK
        TRISC = 0b00010000;
        TRISD = 0b0000000; //all are output, Unused
        TRISE = 0b0000000; // All are output, Unused
    }


    void SPI_Init_Master()
    {
        SSPSTAT = 0b01000000; // SSPSTAT: MSSP STATUS REGISTER (SPI MODE)  SMP=0, CKE=1    
        SSPCON1 = 0b00100010; //Master mode,Serial enable
        PIR1bits.SSPIF=0;   
    }

    void SPI_Write(unsigned char Sendchar)
    {
      unsigned char Receivechar;
      SSPBUF = Sendchar;  //Copy data in SSBUF to transmit
      while (!PIR1bits.SSPIF); //Wait for complete 1 byte transmission
      PIR1bits.SSPIF=0; //Clear SSPIF flag
      Receivechar = SSPBUF;
     
    }

     
    void main(void)

        Port_Initialized();
        SPI_Init_Master();
       
        while (1)
        {
           SPI_Write(0X0A); // sending 1st byte
             __delay_ms(100);
           SPI_Write(0X0F); // sending 2nd byte
             __delay_ms(100);
           SPI_Write(0X15);    // sending 3rd byte
             __delay_ms(100);
       
        }
       
    }



     
     
    #17
    ric
    Super Member
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    Re: PIC18F45K80 SPI initialization setting 2020/10/18 23:01:01 (permalink)
    0
    You're nearly there.
    Next you have to understand that EVERY transfer really is a transfer. There is no seperate read or write.
    So, rename your function from SPI_Write() to SPI_Xfer(), and modify it like this:
    unsigned char SPI_Xfer(unsigned char Sendchar)
    {
      SSPBUF = Sendchar;  //Copy data in SSBUF to transmit
      while (!PIR1bits.SSPIF); //Wait for complete 1 byte transmission
      PIR1bits.SSPIF=0; //Clear SSPIF flag
      return SSPBUF;
    }

     

    I also post at: PicForum
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    To get a useful answer, always state which PIC you are using!
    #18
    1and0
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    Re: PIC18F45K80 SPI initialization setting 2020/10/18 23:21:41 (permalink)
    +1 (1)
    Or this:
    unsigned char SPI_Xfer(unsigned char Sendchar)
    {
      SSPBUF = Sendchar;  //Copy data in SSBUF to transmit
      while (!SSPSTATbits.BF); //Wait for complete 1 byte transmission
      return SSPBUF;
    }

    #19
    Djsarkar
    Super Member
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    Re: PIC18F45K80 SPI initialization setting 2020/10/19 00:10:11 (permalink)
    0
    ricYou're nearly there.Next you have to understand that EVERY transfer really is a transfer. There is no seperate read or write.So, rename your function from SPI_Write() to SPI_Xfer(), and modify it like this:
    Right now I am sending dummy data bytes but I need to send ADC value because ADC MCP3008 will convert analog value of thermocouple into digital value. I don't understand how to do that in code

    // PIC18F45K80 Configuration Bit Settings
    #define _XTAL_FREQ 20000000
    // CONFIG1L
    #pragma config RETEN = ON       // VREG Sleep Enable bit (Ultra low-power regulator is Enabled (Controlled by SRETEN bit))
    #pragma config INTOSCSEL = LOW  // LF-INTOSC Low-power Enable bit (LF-INTOSC in Low-power mode during Sleep)
    // SOSCSEL = No Setting
    #pragma config XINST = OFF      // Extended Instruction Set (Disabled)
    // CONFIG1H
    #pragma config FOSC = HS2        //  HS oscillator (high power, 16 MHz-25 MHz
    #pragma config PLLCFG = OFF     // PLL x4 Enable bit (Disabled)
    #pragma config FCMEN = OFF      // Fail-Safe Clock Monitor (Disabled)
    #pragma config IESO = OFF       // Internal External Oscillator Switch Over Mode (Disabled)
    // CONFIG2L
    #pragma config PWRTEN = ON      // Power Up Timer (Enabled)
    #pragma config BOREN = OFF      // Brown Out Detect (Disabled in hardware, SBOREN disabled)
    #pragma config BORV = 0         // Brown-out Reset Voltage bits (3.0V)
    #pragma config BORPWR = LOW     // BORMV Power level (BORMV set to low power level)
    // CONFIG2H
    #pragma config WDTEN = OFF      // Watchdog Timer (WDT disabled in hardware; SWDTEN bit disabled)
    #pragma config WDTPS = 1        // Watchdog Postscaler (1:1)
    // CONFIG3H
    #pragma config CANMX = PORTC    // ECAN Mux bit (ECAN TX and RX pins are located on RC6 and RC7, respectively)
    #pragma config MSSPMSK = MSK5   // MSSP address masking (5 bit address masking mode)
    #pragma config MCLRE = OFF      // Master Clear Enable (MCLR Disabled, RE3 Enabled)
    // CONFIG4L
    #pragma config STVREN = OFF     // Stack Overflow Reset (Disabled)
    #pragma config BBSIZ = BB1K     // Boot Block Size (1K word Boot Block size)
    // CONFIG5L
    #pragma config CP0 = ON         // Code Protect 00800-01FFF (Enabled)
    #pragma config CP1 = ON         // Code Protect 02000-03FFF (Enabled)
    #pragma config CP2 = ON         // Code Protect 04000-05FFF (Enabled)
    #pragma config CP3 = ON         // Code Protect 06000-07FFF (Enabled)
    // CONFIG5H
    #pragma config CPB = ON         // Code Protect Boot (Enabled)
    #pragma config CPD = ON         // Data EE Read Protect (Enabled)
    // CONFIG6L
    #pragma config WRT0 = ON        // Table Write Protect 00800-01FFF (Enabled)
    #pragma config WRT1 = ON        // Table Write Protect 02000-03FFF (Enabled)
    #pragma config WRT2 = ON        // Table Write Protect 04000-05FFF (Enabled)
    #pragma config WRT3 = ON        // Table Write Protect 06000-07FFF (Enabled)
    // CONFIG6H
    #pragma config WRTC = ON        // Config. Write Protect (Enabled)
    #pragma config WRTB = ON        // Table Write Protect Boot (Enabled)
    #pragma config WRTD = ON        // Data EE Write Protect (Enabled)
    // CONFIG7L
    #pragma config EBTR0 = ON       // Table Read Protect 00800-01FFF (Enabled)
    #pragma config EBTR1 = ON       // Table Read Protect 02000-03FFF (Enabled)
    #pragma config EBTR2 = ON       // Table Read Protect 04000-05FFF (Enabled)
    #pragma config EBTR3 = ON       // Table Read Protect 06000-07FFF (Enabled)
    // CONFIG7H
    #pragma config EBTRB = ON       // Table Read Protect Boot (Enabled)
    // #pragma config statements should precede project file includes.
    // Use project enums instead of #define for ON and OFF.
    #include <xc.h>
    #define TRUE                  1
    void Port_Initialized (void)
    {
        ANCON0 = 0; // Set to digital port
        ANCON1 = 0; // Set to digital port
        CM1CON = 0; // Comparator off
        CM2CON = 0; // Comparator off
        ADCON0 = 0; // A/D conversion Disabled
        ADCON1 = 0; // A/D conversion Disabled
        ADCON2 = 0; // A/D conversion Disabled
       
        LATA =  0;  //Make all PORTA pins low
        LATB =  0;  //Make all PORTB pins low
        LATC =  0;  //Make all PORTC pins low
        LATD =  0;  //Make all PORTD pins low
        LATE =  0;  //Make all PORTE pins low
       
        TRISA = 0b0000000; // Slave Select (SS)  RA5/AN4/C2INB/
        TRISB = 0b0000000; // all are output, Unused
       
        //Serial Data Out (SDO)  RC5/SDO,
        //Serial Data In (SDI)  RC4/SDA/SDI
        //Serial Clock (SCK)  RC3/REF0/SCL/SCK
        TRISC = 0b00010000;
        TRISD = 0b0000000; //all are output, Unused
        TRISE = 0b0000000; // All are output, Unused
    }
    void SPI_Init_Master()
    {
        SSPSTAT = 0b01000000; // SSPSTAT: MSSP STATUS REGISTER (SPI MODE)  SMP=0, CKE=1    
        SSPCON1 = 0b00100010; //Master mode,Serial enable
        PIR1bits.SSPIF=0;   
    }
    unsigned char SPI_Xfer(unsigned char Sendchar)
    {
      SSPBUF = Sendchar;  //Copy data in SSBUF to transmit
      while (!PIR1bits.SSPIF); //Wait for complete 1 byte transmission
      PIR1bits.SSPIF=0; //Clear SSPIF flag
      return SSPBUF;
    }
     
    void main(void)

        Port_Initialized();
        SPI_Init_Master();
       
        while (1)
        {

       
        }
       
    }
    post edited by Djsarkar - 2020/10/19 00:36:53
    #20
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