PIC24FJ256GA702 OC Mode1 Issue
Here is a problem we have been seeing on PIC24FJ256GA702, some not all, so it is weird.
MCCP1 is being used as a PWM output.
OC1 is in Mode 1 and triggering from MCCP1.
TRIGSTAT is always cleared prior to setting Mode 1
OC1R is set to 78
The OC1 interrupt disables OC1 by setting Mode 0.
On some MCUs OC1 stops running and an interrupt is never generated.
TRIGSTAT will be set and OC1TMR will be at zero or stopped at some low value, < 78.
On some MCUs OC1 always works correctly, on others it may break after power cycling.
If Mode 4 is used on OC1, with OC1R set to 77, and OC1RS set to 78, no failures have been found on any of the MCUs tested thus far.
I wrote a standalone program to demonstrate the problem and I have attached that.
Has anyone seen this issue and is this fix a reasonable one?