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AnsweredHot!Is Allowing analog input to exceed VREFH but remain below VDD safe

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snellr314
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2020/08/14 05:56:05 (permalink)
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Is Allowing analog input to exceed VREFH but remain below VDD safe

I think it's a straight forward question and maybe it's obvious, but I'm wondering if anyone can confirm that allowing my analog signal to be 2.5V, which would exceed my VREFH (2V) but remain below my supply VDDA (3.3V), is a safe condition which simply saturates the adc reading.
 
The absolute maximums don't reference the VREFH voltage and the ADC section of the Electrical specs (pic attached) didn't seem to answer my question.

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nigelwright7557
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Re: Is Allowing analog input to exceed VREFH but remain below VDD safe 2020/08/14 07:59:23 (permalink)
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i always put in series resistor to stop latch up from over/under volts.
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JPortici
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Re: Is Allowing analog input to exceed VREFH but remain below VDD safe 2020/08/14 10:47:16 (permalink) ☼ Best Answerby snellr314 2020/08/14 10:57:12
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Yes, it's a safe condition and as you would expect Analog input between VREFH and AVDD will result in a full scale output
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