Several concerns about the ATSAM3X8E documentation
I am designing a project that includes an ATSAM3X8E-AU.
I have read the datasheet  and schematic checklist , and I have some concerns, both with potentially-inaccurate information, and missing or incomplete information.
To start off, however, I note that there is no subforum dedicated to issues with the Microchip website itself
. This means that I will have to state here instead, that the schematic checklist  is not reachable
from the Documents tab of the ATSAM3X8E webpage . Furthermore, the link to the datasheet uses http, not https
, even though https works. Perhaps a Microchip website developer/maintainer could correct this.
Now, on with my actual concerns.
Section 5.4 (Page 22) of the datasheet depicts an electrolytic
capacitor on Main Supply as close to the MCU as possible. Furthermore, it depicts another electrolytic
capacitor on the voltage regulator output, again as close to the MCU as possible. This is also depicted in Section 2.1.1 (Page 4) of the schematic checklist. So far so good.
However, the schematic checklist and the datasheet start to disagree with each other about how much more filtering is needed; the datasheet says that the main supply can be connected directly to
VDDUTMI and VDDANA; and that VDDOUT can be connected directly to
VDDPLL. However, the schematic checklist says that VDDUTMI, VDDANA, and VDDPLL need RLC filtering, instead of a direct connection
. Furthermore, the datasheet is missing the per-pin decoupling capacitors in its schematic.
Next, the schematic checklist diagram depicts a 4.7uF electrolytic
capacitor on VDDIN, but the table on the very next page says that it must be a 10uF or higher ceramic capacitor instead
. This same table also repeats that VDDUTMI, VDDANA, and VDDPLL need the additional RLC filtering
, and also, seemingly erroneously, states that the capacitor on VDDOUT must also be a ceramic
This leaves me unsure of exactly what type and value of capacitors to use. At the moment, my design includes two 4.7uF electrolytics, on VDDIN and VDDOUT, as depicted in the schematic, but in direct contravention of the table on the very next page. Should they be electrolytics or ceramics? If they should be ceramics, the schematic needs to be corrected to use the non-polarised capacitor symbol, as it already does for the per-pin 100nF decouplers. Alternatively, if they must be electrolytics, the table needs to be corrected instead, and in any event, the schematic and the table need to be brought into agreement
on the value of the VDDIN capacitor.
Finally, I am unsure about whether some of the MCU pins can be left floating or not, as the datasheet and schematic checklist documents do not go into a lot of detail on this subject.
First, my design does not include any oscillators, as I want to rely on only the internal factory-trimmed oscillator; I will not be using standby or wait, and I will not be using the USB port. However, this leaves me unsure on whether I can leave XIN, XOUT, XIN32, and XOUT32 unconnected or not, or whether I need to at least include the decouplers while omitting the oscillator itself. Also, since I won't be using the USB port, this leaves me unsure of whether I can leave VBUS unconnected or not, since the table in Section 2.9 (Page 14) of the schematic checklist does not say whether you can leave VBUS floating, while it does say this for every other USB-related pin
I would appreciate it if a Microchip technical engineer could enlighten me, and arrange to correct some of these document errors and discrepancies.