• AVR Freaks

AnsweredHot!PIC24FJ128GB202 / Oscillator / USB

Starting Member
  • Total Posts : 64
  • Reward points : 0
  • Joined: 2019/08/13 12:07:00
  • Location: 0
  • Status: offline
2020/07/07 20:26:35 (permalink)

PIC24FJ128GB202 / Oscillator / USB

Me again with another oscillator & USB question!  I used MCC to select the clock settings I wanted for this chip.  Upon launching system module I checked "FRC postscaler" and that value is "8 MHz 1:1."  "PLL enable" is also checked.  The prescaler and CPU divisor respectively are "1:2" and "1:2."  It calculates that I will have a Fosc = 16 MHz and a USB clock of 48 MHz.  This I believe is desired for full speed USB.  Now going to the generated clock.c file I have this.
void CLOCK_Initialize(void)
    // CPDIV 1:2; PLLEN enabled; RCDIV FRC/1; DOZE 1:8; DOZEN disabled; ROI disabled;
    CLKDIV = 0x3060;
    // STOR disabled; STORPOL Interrupt when STOR is 1; STSIDL disabled; STLPOL Interrupt when STLOCK is 1; STLOCK disabled; STSRC SOSC; STEN disabled; TUN Center frequency;
    OSCTUN = 0x00;
    // ROEN disabled; ROSWEN disabled; ROSEL FOSC; ROOUT disabled; ROSIDL disabled; ROSLP disabled;
    REFOCONL = 0x00;
    // RODIV 0;
    REFOCONH = 0x00;
    // ROTRIM 0;
    REFOTRIML = 0x00;
    // ADC1MD enabled; T3MD enabled; T4MD enabled; T1MD enabled; U2MD enabled; T2MD enabled; U1MD enabled; SPI2MD enabled; SPI1MD enabled; T5MD enabled; I2C1MD enabled;
    PMD1 = 0x00;
    // OC5MD enabled; IC6MD enabled; OC6MD enabled; IC5MD enabled; IC4MD enabled; IC3MD enabled; OC1MD enabled; IC2MD enabled; OC2MD enabled; IC1MD enabled; OC3MD enabled; OC4MD enabled;
    PMD2 = 0x00;
    // DSMMD enabled; U3MD enabled; RTCCMD enabled; CMPMD enabled; CRCMD enabled; I2C2MD enabled;
    PMD3 = 0x00;
    // U4MD enabled; UPWMMD enabled; USB1MD enabled; CTMUMD enabled; REFOMD enabled; HLVDMD enabled;
    PMD4 = 0x00;
    // SPI3MD enabled;
    PMD6 = 0x00;
    // DMA1MD enabled; DMA0MD enabled;
    PMD7 = 0x00;
    // CRYMD enabled;
    PMD8 = 0x00;
    // CF no clock failure; NOSC FRCPLL; SOSCEN disabled; POSCEN disabled; CLKLOCK unlocked; OSWEN Switch is Complete; IOLOCK not-active;
    __builtin_write_OSCCONH((uint8_t) (0x01));
    __builtin_write_OSCCONL((uint8_t) (0x01));
    // Wait for Clock switch to occur
    while (OSCCONbits.OSWEN != 0);
    while (OSCCONbits.LOCK != 1);

And looking at the system.c file, I have this.
#pragma config DSWDTPS = DSWDTPS1F //Deep Sleep Watchdog Timer Postscale Select bits->1:68719476736 (25.7 Days)
#pragma config DSWDTOSC = LPRC //DSWDT Reference Clock Select->DSWDT uses LPRC as reference clock
#pragma config DSBOREN = ON //Deep Sleep BOR Enable bit->DSBOR Enabled
#pragma config DSWDTEN = ON //Deep Sleep Watchdog Timer Enable->DSWDT Enabled
#pragma config DSSWEN = ON //DSEN Bit Enable->Deep Sleep is controlled by the register bit DSEN
#pragma config PLLDIV = DIVIDE2 //USB 96 MHz PLL Prescaler Select bits->Oscillator input divided by 2 (8 MHz input)
#pragma config I2C1SEL = DISABLE //Alternate I2C1 enable bit->I2C1 uses SCL1 and SDA1 pins
#pragma config IOL1WAY = ON //PPS IOLOCK Set Only Once Enable bit->Once set, the IOLOCK bit cannot be cleared

#pragma config WPFP = WPFP127 //Write Protection Flash Page Segment Boundary->Page 127 (0x1FC00)
#pragma config SOSCSEL = OFF //SOSC Selection bits->Digital (SCLKI) mode
#pragma config WDTWIN = PS25_0 //Window Mode Watchdog Timer Window Width Select->Watch Dog Timer Window Width is 25 percent
#pragma config PLLSS = PLL_FRC //PLL Secondary Selection Configuration bit->PLL is fed by the on-chip Fast RC (FRC) oscillator
#pragma config BOREN = ON //Brown-out Reset Enable->Brown-out Reset Enable
#pragma config WPDIS = WPDIS //Segment Write Protection Disable->Disabled
#pragma config WPCFG = WPCFGDIS //Write Protect Configuration Page Select->Disabled
#pragma config WPEND = WPENDMEM //Segment Write Protection End Page Select->Write Protect from WPFP to the last page of memory

#pragma config POSCMD = NONE //Primary Oscillator Select->Primary Oscillator Disabled
#pragma config WDTCLK = LPRC //WDT Clock Source Select bits->WDT uses LPRC
#pragma config OSCIOFCN = OFF //OSCO Pin Configuration->OSCO/CLKO/RA3 functions as CLKO (FOSC/2)
#pragma config FCKSM = CSECMD //Clock Switching and Fail-Safe Clock Monitor Configuration bits->Clock switching is enabled, Fail-Safe Clock Monitor is disabled
#pragma config FNOSC = FRC //Initial Oscillator Select->FRC
#pragma config ALTRB6 = APPEND //Alternate RB6 pin function enable bit->Append the RP6/ASCL1/PMPD6 functions of RB6 to RA1 pin functions
#pragma config ALTCMPI = CxINC_RB //Alternate Comparator Input bit->C1INC is on RB13, C2INC is on RB9 and C3INC is on RA0
#pragma config WDTCMX = WDTCLK //WDT Clock Source Select bits->WDT clock source is determined by the WDTCLK Configuration bits
#pragma config IESO = OFF //Internal External Switchover->Disabled

#pragma config WDTPS = PS32768 //Watchdog Timer Postscaler Select->1:32768
#pragma config FWPSA = PR128 //WDT Prescaler Ratio Select->1:128
#pragma config WINDIS = OFF //Windowed WDT Disable->Standard Watchdog Timer
#pragma config FWDTEN = OFF //Watchdog Timer Enable->WDT disabled in hardware; SWDTEN bit disabled
#pragma config ICS = PGx1 //Emulator Pin Placement Select bits->Emulator functions are shared with PGEC1/PGED1
#pragma config LPCFG = OFF //Low power regulator control->Disabled - regardless of RETEN
#pragma config GWRP = OFF //General Segment Write Protect->Write to program memory allowed
#pragma config GCP = OFF //General Segment Code Protect->Code protection is disabled
#pragma config JTAGEN = OFF //JTAG Port Enable->Disabled

#include "pin_manager.h"
#include "clock.h"
#include "system.h"
#include "interrupt_manager.h"
#include "traps.h"

void SYSTEM_Initialize(void)

Can someone tell me what is wrong with this?  I'm especially looking at the PLLDIV = DIVIDE2 statement and drawing a blank.  In any case, it's not enumerating (I am of the impression that the USB library does not need to be loaded on this to do that since enumeration code is built in?).  I'm questioning these configuration settings first and foremost before I question built in FRC accuracy.
Super Member
  • Total Posts : 28009
  • Reward points : 0
  • Joined: 2003/11/07 12:41:26
  • Location: Australia, Melbourne
  • Status: offline
Re: PIC24FJ128GB202 / Oscillator / USB 2020/07/07 20:53:10 (permalink) ☼ Best Answerby IBrokeIt 2020/07/08 18:36:10
5 (1)
 (I am of the impression that the USB library does not need to be loaded on this to do that since enumeration code is built in?).

What gives you that impression?
Only the very lowest level of the hardware is "built in".
Everything else is managed by firmware in the PIC, which you have not yet loaded.

I also post at: PicForum
Links to useful PIC information: http://picforum.ric323.co...opic.php?f=59&t=15
NEW USERS: Posting images, links and code - workaround for restrictions.
To get a useful answer, always state which PIC you are using!
عُضْوٌ جَدِيد
  • Total Posts : 11936
  • Reward points : 0
  • Joined: 2004/02/13 12:31:19
  • Location: Southern California
  • Status: offline
Re: PIC24FJ128GB202 / Oscillator / USB 2020/07/07 20:53:29 (permalink)
5 (1)
Built in to what?  The PIC?  No, there is no USB firmware in the PIC.  You can't do anything with USB without  firmware.
Super Member
  • Total Posts : 406
  • Reward points : 0
  • Joined: 2019/04/16 22:01:25
  • Location: 0
  • Status: offline
Re: PIC24FJ128GB202 / Oscillator / USB 2020/07/07 21:19:22 (permalink)
(I am of the impression that the USB library does not need to be loaded on this to do that since enumeration code is built in?).

Incorrect .... the 10 second version of enumeration
1.) Power comes on the devices all physically queue to be enumerated on the host (ID 0) called the default pipe
2.) At low speed the host exchanges 8 bytes and then assigns an address to the device.
3.) The device holds that address and now only responds to messages at that address
4.) The host will move to proper device speed and exchange config and settings
5.) The device is now configured and it moves from the setup state to the enumerated state
So NO it requires the USB software otherwise all your devices just sit lined up waiting for comms on the default pipe.
Starting Member
  • Total Posts : 64
  • Reward points : 0
  • Joined: 2019/08/13 12:07:00
  • Location: 0
  • Status: offline
Re: PIC24FJ128GB202 / Oscillator / USB 2020/07/07 21:42:55 (permalink)
Firmware loaded from MLA and wiring oops fixed.  I don't know why I got the impression that the device could simply enumerate on its own at a hardware level...so let's pretend I didn't ask that.  I am getting feedback from Windows that device initialization is bombing out with "device descriptor request failed."  I'm still questioning the wiring for this.  VUSB3V3 should have a .1uF cap to ground, be connected to Vdd, and have a pull up of 1.5kOhm to D+ right?  Nothing else involved there?  If so hmmm.
Starting Member
  • Total Posts : 64
  • Reward points : 0
  • Joined: 2019/08/13 12:07:00
  • Location: 0
  • Status: offline
Re: PIC24FJ128GB202 / Oscillator / USB 2020/07/08 18:35:58 (permalink)
4 (1)
Just following up on this in case anyone else reads through, turns out that the CDC MLA example (originally configured for PIC24FJ128GB204) is set up to use an external oscillator and I was expecting to use the internal FRC oscillator.  So merging the configuration settings exactly as I had originally posted with the MLA project will in fact work.  Device is recognized as a COM port now.  If looking to move to the smaller form factor 202 as I did though you will need to either remap all the IO (buttons and LEDs functions) or remove entirely as I did.
Jump to:
© 2020 APG vNext Commercial Version 4.5