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Hot!dsPIC33CK256MP506 PWM UPDATE with MCC Generated Code:

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karan123
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2020/07/01 11:37:07 (permalink)
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dsPIC33CK256MP506 PWM UPDATE with MCC Generated Code:

Hi,
 
 
I have successfully generated PWM waveform with MCC but MCC is new for me. 
PWM Operation Mode -> Center Aligned
PWM Output Mode     -> Push-Pull

#include "pwm.h"
/**
Section: Driver Interface Function Definitions
*/
void PWM_Initialize (void)
{
// MCLKSEL FOSC - System Clock; HRERR disabled; LOCK disabled; DIVSEL 1:2;
PCLKCON = 0x00;
// FSCL 0;
FSCL = 0x00;
// FSMINPER 0;
FSMINPER = 0x00;
// MPHASE 0;
MPHASE = 0x00;
// MDC 0;
MDC = 0x00;
// MPER 16;
MPER = 0x10;
// LFSR 0;
LFSR = 0x00;
// CTA7EN disabled; CTA8EN disabled; CTA1EN disabled; CTA2EN disabled; CTA5EN disabled; CTA6EN disabled; CTA3EN disabled; CTA4EN disabled;
CMBTRIGL = 0x00;
// CTB8EN disabled; CTB3EN disabled; CTB2EN disabled; CTB1EN disabled; CTB7EN disabled; CTB6EN disabled; CTB5EN disabled; CTB4EN disabled;
CMBTRIGH = 0x00;
// PWMLFA PWMS1 or PWMS2;; S1APOL Positive logic; S2APOL Positive logic; PWMLFAD No Assignment; PWMS1A PWM1H; PWMS2A PWM1H;
LOGCONA = 0x00;
// PWMLFB PWMS1 | PWMS2; S2BPOL Positive logic; PWMLFBD No Assignment; S1BPOL Positive logic; PWMS2B PWM1H; PWMS1B PWM1H;
LOGCONB = 0x00;
// PWMLFC PWMS1 | PWMS2; PWMLFCD No Assignment; S2CPOL Positive logic; S1CPOL Positive logic; PWMS1C PWM1H; PWMS2C PWM1H;
LOGCONC = 0x00;
// PWMS1D PWM1H; S1DPOL Positive logic; PWMLFD PWMS1 | PWMS2; PWMLFDD No Assignment; S2DPOL Positive logic; PWMS2D PWM1H;
LOGCOND = 0x00;
// PWMS1E PWM1H; PWMS2E PWM1H; S1EPOL Positive logic; PWMLFE PWMS1 | PWMS2; S2EPOL Positive logic; PWMLFED No Assignment;
LOGCONE = 0x00;
// S1FPOL Positive logic; PWMS2F PWM1H; PWMS1F PWM1H; S2FPOL Positive logic; PWMLFFD No Assignment; PWMLFF PWMS1 | PWMS2;
LOGCONF = 0x00;
// EVTASEL PGTRGSEL bits; EVTASYNC Not synchronized; EVTAPOL Active-high; EVTAPGS PG1; EVTASTRD Stretched to 8 PWM clock cycles minimum; EVTAOEN disabled;
PWMEVTA = 0x00;
// EVTBPGS PG1; EVTBSYNC Not synchronized; EVTBPOL Active-high; EVTBSEL PGTRGSEL bits; EVTBSTRD Stretched to 8 PWM clock cycles minimum; EVTBOEN disabled;
PWMEVTB = 0x00;
// EVTCPGS PG1; EVTCPOL Active-high; EVTCSEL PGTRGSEL bits; EVTCSTRD Stretched to 8 PWM clock cycles minimum; EVTCSYNC Not synchronized; EVTCOEN disabled;
PWMEVTC = 0x00;
// EVTDOEN disabled; EVTDSTRD Stretched to 8 PWM clock cycles minimum; EVTDPOL Active-high; EVTDPGS PG1; EVTDSEL PGTRGSEL bits; EVTDSYNC Not synchronized;
PWMEVTD = 0x00;
// EVTEOEN disabled; EVTEPOL Active-high; EVTEPGS PG1; EVTESTRD Stretched to 8 PWM clock cycles minimum; EVTESEL PGTRGSEL bits; EVTESYNC Not synchronized;
PWMEVTE = 0x00;
// EVTFPOL Active-high; EVTFPGS PG1; EVTFSTRD Stretched to 8 PWM clock cycles minimum; EVTFSEL PGTRGSEL bits; EVTFOEN disabled; EVTFSYNC Not synchronized;
PWMEVTF = 0x00;
// MSTEN disabled; TRGMOD Single trigger mode; SOCS Self-trigger; UPDMOD SOC update; MPHSEL disabled; MPERSEL disabled; MDCSEL disabled;
PG1CONH = 0x00;
// TRSET disabled; UPDREQ disabled; CLEVT disabled; TRCLR disabled; CAP disabled; SEVT disabled; FFEVT disabled; UPDATE disabled; FLTEVT disabled;
PG1STAT = 0x00;
// FLTDAT 0; DBDAT 0; SWAP disabled; OVRENH disabled; OVRENL disabled; OSYNC User output overrides are synchronized to the local PWM time base; CLMOD disabled; FFDAT 0; CLDAT 0; OVRDAT 0;
PG1IOCONL = 0x00;
// PENL enabled; DTCMPSEL PCI Sync Logic; PMOD Push-Pull; POLL Active-high; PENH disabled; CAPSRC Software; POLH Active-high;
PG1IOCONH = 0x24;
// UPDTRG Manual; ADTR1PS 1:1; PGTRGSEL EOC event; ADTR1EN3 disabled; ADTR1EN1 disabled; ADTR1EN2 disabled;
PG1EVTL = 0x00;
// ADTR2EN1 disabled; IEVTSEL EOC; SIEN disabled; FFIEN disabled; ADTR1OFS None; CLIEN disabled; FLTIEN disabled; ADTR2EN2 disabled; ADTR2EN3 disabled;
PG1EVTH = 0x00;
// PSS Tied to 0; PPS Not inverted; SWTERM disabled; PSYNC disabled; TERM Manual Terminate; AQPS Not inverted; AQSS None; TSYNCDIS PWM EOC;
PG1FPCIL = 0x00;
// TQPS Not inverted; LATMOD disabled; SWPCI Drives '0'; BPEN disabled; TQSS None; SWPCIM PCI acceptance logic; BPSEL PWM Generator 1; ACP Level-sensitive;
PG1FPCIH = 0x00;
// PSS Tied to 0; PPS Not inverted; SWTERM disabled; PSYNC disabled; TERM Manual Terminate; AQPS Not inverted; AQSS None; TSYNCDIS PWM EOC;
PG1CLPCIL = 0x00;
// PCIGT disabled; TQPS Not inverted; SWPCI Drives '0'; BPEN disabled; TQSS None; SWPCIM PCI acceptance logic; BPSEL PWM Generator 1; ACP Level-sensitive;
PG1CLPCIH = 0x00;
// PSS Tied to 0; PPS Not inverted; SWTERM disabled; PSYNC disabled; TERM Manual Terminate; AQPS Not inverted; AQSS None; TSYNCDIS PWM EOC;
PG1FFPCIL = 0x00;
// PCIGT disabled; TQPS Not inverted; SWPCI Drives '0'; BPEN disabled; TQSS None; SWPCIM PCI acceptance logic; BPSEL PWM Generator 1; ACP Level-sensitive;
PG1FFPCIH = 0x00;
// PSS Tied to 0; PPS Not inverted; SWTERM disabled; PSYNC disabled; TERM Manual Terminate; AQPS Not inverted; AQSS None; TSYNCDIS PWM EOC;
PG1SPCIL = 0x00;
// PCIGT disabled; TQPS Not inverted; SWPCI Drives '0'; BPEN disabled; TQSS None; SWPCIM PCI acceptance logic; BPSEL PWM Generator 1; ACP Level-sensitive;
PG1SPCIH = 0x00;
// LEB 0;
PG1LEBL = 0x00;
// PWMPCI 1; PLR disabled; PLF disabled; PHR disabled; PHF disabled;
PG1LEBH = 0x00;
// PHASE 0;
PG1PHASE = 0x00;
// DC 9;
PG1DC = 0x09;
// DCA 0;
PG1DCA = 0x00;
// PER 16;
PG1PER = 0x10;
// TRIGA 0;
PG1TRIGA = 0x00;
// TRIGB 0;
PG1TRIGB = 0x00;
// TRIGC 0;
PG1TRIGC = 0x00;
// DTL 0;
PG1DTL = 0x00;
// DTH 0;
PG1DTH = 0x00;
// HREN disabled; MODSEL Center-Aligned; TRGCNT 1; CLKSEL Master clock; ON enabled;
PG1CONL = 0x800C;
}
void __attribute__ ((weak)) PWM_Generator1_CallBack(void)
{
// Add Application code here
}
void PWM_Generator1_Tasks(void)
{
if(IFS4bits.PWM1IF)
{
// PWM Generator1 callback function
PWM_Generator1_CallBack();
// clear the PWM Generator1 interrupt flag
IFS4bits.PWM1IF = 0;
}
}

void __attribute__ ((weak)) PWM_EventA_CallBack(void)
{
// Add Application code here
}
void PWM_EventA_Tasks(void)
{
if(IFS10bits.PEVTAIF)
{

// PWM EventA callback function
PWM_EventA_CallBack();

// clear the PWM EventA interrupt flag
IFS10bits.PEVTAIF = 0;
}
}
void __attribute__ ((weak)) PWM_EventB_CallBack(void)
{
// Add Application code here
}
void PWM_EventB_Tasks(void)
{
if(IFS10bits.PEVTBIF)
{

// PWM EventB callback function
PWM_EventB_CallBack();

// clear the PWM EventB interrupt flag
IFS10bits.PEVTBIF = 0;
}
}
void __attribute__ ((weak)) PWM_EventC_CallBack(void)
{
// Add Application code here
}
void PWM_EventC_Tasks(void)
{
if(IFS10bits.PEVTCIF)
{

// PWM EventC callback function
PWM_EventC_CallBack();

// clear the PWM EventC interrupt flag
IFS10bits.PEVTCIF = 0;
}
}
void __attribute__ ((weak)) PWM_EventD_CallBack(void)
{
// Add Application code here
}
void PWM_EventD_Tasks(void)
{
if(IFS10bits.PEVTDIF)
{

// PWM EventD callback function
PWM_EventD_CallBack();

// clear the PWM EventD interrupt flag
IFS10bits.PEVTDIF = 0;
}
}
void __attribute__ ((weak)) PWM_EventE_CallBack(void)
{
// Add Application code here
}
void PWM_EventE_Tasks(void)
{
if(IFS10bits.PEVTEIF)
{

// PWM EventE callback function
PWM_EventE_CallBack();

// clear the PWM EventE interrupt flag
IFS10bits.PEVTEIF = 0;
}
}
void __attribute__ ((weak)) PWM_EventF_CallBack(void)
{
// Add Application code here
}
void PWM_EventF_Tasks(void)
{
if(IFS10bits.PEVTFIF)
{

// PWM EventF callback function
PWM_EventF_CallBack();

// clear the PWM EventF interrupt flag
IFS10bits.PEVTFIF = 0;
}
}

How to update PWM Update Frequency / Duty Cycle with MCC generated code ?
Do I need to create own function like below?
 
Like in dsPIC33EP without MCC ..
PHASEx= ( Fosc/Fpwm x PWM Input Clock Prescaler x 2 )
 
PDC = ( Fosc/FPwm x PWM Input Clock Prescaler ) x Desired Duty Cycle
 
--
Karan
#1

9 Replies Related Threads

    karan123
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    Re: dsPIC33CK256MP506 PWM UPDATE with MCC Generated Code: 2020/07/02 09:34:20 (permalink)
    0
    Any update?
    #2
    du00000001
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    Re: dsPIC33CK256MP506 PWM UPDATE with MCC Generated Code: 2020/07/02 10:08:19 (permalink)
    0
    What about RTFM ?
    "FM" = datasheet + PWM FRM

    PEBKAC / EBKAC / POBCAK / PICNIC (eventually see en.wikipedia.org)
    #3
    karan123
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    Re: dsPIC33CK256MP506 PWM UPDATE with MCC Generated Code: 2020/07/03 05:12:54 (permalink)
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    Hi,
     
    As per FRM as attached..
    https://imgur.com/a/XudxfMS
     
     
    // MCC Generated
    void PWM_Initialize (void)
     
    Can MCC Generated ?? like below : 
    void PWM1_UpdateFrequency (void)
    void PWM1_UpdateDutyCycle (void)
     
    --
    Karan
    post edited by karan123 - 2020/07/03 05:15:28
    #4
    du00000001
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    Re: dsPIC33CK256MP506 PWM UPDATE with MCC Generated Code: 2020/07/03 08:16:01 (permalink)
    2 (1)
    If MCC didn't generate such functions, it currently "can't". Otherwise it would have generated these.
    But honestly: writing some value to the duty cycle register(s) can't be that challenging. The same applies for the period register(s).
    I can somewhat guess why such functions aren't generated: the duty cycle value depends on the pefiod value (plus some other values).
    So don't expect MCC to eat and digest all and everything for you!
     
    Edited: What was initially written as "frequencies" should have been "functions" (now corrected).
    post edited by du00000001 - 2020/07/03 12:34:51

    PEBKAC / EBKAC / POBCAK / PICNIC (eventually see en.wikipedia.org)
    #5
    karan123
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    Re: dsPIC33CK256MP506 PWM UPDATE with MCC Generated Code: 2020/07/03 08:21:17 (permalink)
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    du00000001
    If MCC didn't generate such frequencies, it currently "can't". Otherwise it would have generated these.But honestly: writing some value to the duty cycle register(s) can't be that challenging. The same applies for the period register(s).I can somewhat guess why such functions aren't generated: the duty cycle value depends on the pefiod value (plus some other values).So don't expect MCC to eat and digest all and everything for you!

    OK.. Good. Thanks..
    But MCC generate below function for PIC16F18456 .

    void PWM1_LoadDutyValue(uint16_t dutyValue)
    {
    dutyValue &= 0x03FF;
    // Load duty cycle value
    if(CCP1CONbits.FMT)
    {
    dutyValue <<= 6;
    CCPR1H = dutyValue >> 8;
    CCPR1L = dutyValue;
    }
    else
    {
    CCPR1H = dutyValue >> 8;
    CCPR1L = dutyValue;
    }
    }

     
    post edited by karan123 - 2020/07/03 08:36:54
    #6
    du00000001
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    Re: dsPIC33CK256MP506 PWM UPDATE with MCC Generated Code: 2020/07/03 12:39:08 (permalink)
    0
    Re code for PIC16F18456:
    As can be seen from the code, this PWM requires bit shifting and the right sequence during update. This is not quite trivial, thus they may have decided to create an interface function. But it's still up to you to provide the appropriate DC value to be written.

    PEBKAC / EBKAC / POBCAK / PICNIC (eventually see en.wikipedia.org)
    #7
    karan123
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    Re: dsPIC33CK256MP506 PWM UPDATE with MCC Generated Code: 2020/07/03 21:33:32 (permalink)
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    du00000001
    Re code for PIC16F18456:As can be seen from the code, this PWM requires bit shifting and the right sequence during update. This is not quite trivial, thus they may have decided to create an interface function. But it's still up to you to provide the appropriate DC value to be written.

    Can this type of function is generated for

    void PWM1_LoadDutyValue(uint16_t dutyValue)
    dsPIC33CK256MP506 with MCC

    ?
    #8
    karan123
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    Re: dsPIC33CK256MP506 PWM UPDATE with MCC Generated Code: 2020/07/04 07:41:18 (permalink)
    0
    Hi
     
    PG1DC is responsible for Duty Cycle Update.
    But When Enter 50 , got 25 Duty Cycle on DSO and  When Enter 100 , got 50 Duty Cycle on DSO for 
    Center Aligned Push Pull Mode .
    Why So ??
     
    https://imgur.com/a/TZwypHB
     
    --
    Karan
     
     
    post edited by karan123 - 2020/07/04 07:46:43
    #9
    du00000001
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    Re: dsPIC33CK256MP506 PWM UPDATE with MCC Generated Code: 2020/07/04 08:27:46 (permalink)
    4 (1)
    karan123
    Why So ??

     
    WHY don't you just read the datasheet ?
    I know: getting every single line of the datasheet explained is way less tiresome than reaing yourself and trying to understand. But it's just annoying for the forum's contributors to explain every single student the basics ever and ever again.
     
    One hint: PG1DC is NOT the duty cycle in % !
    Second hint: your period seems to be 200.

    PEBKAC / EBKAC / POBCAK / PICNIC (eventually see en.wikipedia.org)
    #10
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