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ft.ovah
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2020/06/01 03:52:27 (permalink)
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Dspic30f_clock issue

Hi , I have a dspic30f2010,im simply toggling an led on Port E ,so that it could give me a clock close to 30Mhz using an external crystal on 7.3Mhz and these are my configuration bits : 
 
; FOSC
#pragma config FPR = XT_PLL16 // Primary Oscillator Mode (XT w/PLL 16x)
#pragma config FOS = PRI // Oscillator Source (Primary Oscillator)
#pragma config FCKSMEN = CSW_FSCM_OFF // Clock Switching and Monitor (Sw Disabled, Mon Disabled)
; FWDT
#pragma config FWPSB = WDTPSB_16 // WDT Prescaler B (1:16)
#pragma config FWPSA = WDTPSA_512 // WDT Prescaler A (1:512)
#pragma config WDT = WDT_ON // Watchdog Timer (Enabled)
; FBORPOR
#pragma config FPWRT = PWRT_64 // POR Timer Value (64ms)
#pragma config BODENV = BORV_45 // Brown Out Voltage (4.5V)
#pragma config BOREN = PBOR_ON // PBOR Enable (Enabled)
#pragma config LPOL = PWMxL_ACT_HI // Low-side PWM Output Polarity (Active High)
#pragma config HPOL = PWMxH_ACT_HI // High-side PWM Output Polarity (Active High)
#pragma config PWMPIN = RST_IOPIN // PWM Output Pin Reset (Control with PORT/TRIS regs)
#pragma config MCLRE = MCLR_EN // Master Clear Enable (Enabled)

; FGS
#pragma config GWRP = GWRP_OFF // General Code Segment Write Protect (Disabled)
#pragma config GCP = CODE_PROT_OFF // General Segment Code Protection (Disabled)
; FICD
#pragma config ICS = PGD
 
As i said in the main im simply toggling an led,the problem is that no matter what setting i choose i will always get a frequency of 304Khz,can someone tell me what im doing wrong ? also do i have to tell tell the mcu to configure the port 9 and 10 as OSC1 and OSC2 or will understand it automatically ?, is something wrong with my hardware ?.Also this is the dspic30f varient so the clock is divide by 4. 
#1

23 Replies Related Threads

    ric
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    Re: Dspic30f_clock issue 2020/06/01 04:54:26 (permalink)
    0
    Where is the rest of your code?
    It's hard to comment on code you don't post.
     

    I also post at: PicForum
    Links to useful PIC information: http://picforum.ric323.co...opic.php?f=59&t=15
    NEW USERS: Posting images, links and code - workaround for restrictions.
    To get a useful answer, always state which PIC you are using!
    #2
    ft.ovah
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    Re: Dspic30f_clock issue 2020/06/01 07:30:36 (permalink)
    0
    Sorry Ric,I thought I had given everything, My bad.
     
     
    .equ __30F2010, 1
    .include "p30f2010.inc"
    ;------------------------------------------------------------------------------
    ;Global Declarations
    .global __reset ;The label for the first line of code
    .global __OscillatorFail ;Declare Oscillator Fail trap routine label
    .global __AddressError ;Declare Address Error trap routine label
    .global __StackError ;Declare Stack Error trap routine label
    .global __MathError ;Declare Math Error trap routine label
    ;------------------------------------------------------------------------------
    #pragma config FPR = ECIO_PLL16 // Primary Oscillator Mode (ECIO w/ PLL 8x)
    #pragma config FOS = PRI // Oscillator Source (Primary Oscillator)
    #pragma config FCKSMEN = CSW_FSCM_OFF // Clock Switching and Monitor (Sw Disabled, Mon Disabled)

    #pragma config FWPSB = WDTPSB_16 // WDT Prescaler B (1:16)
    #pragma config FWPSA = WDTPSA_512 // WDT Prescaler A (1:512)
    #pragma config WDT = WDT_ON // Watchdog Timer (Enabled)

    #pragma config FPWRT = PWRT_64 // POR Timer Value (64ms)
    #pragma config BODENV = BORV_45 // Brown Out Voltage (4.5V)
    #pragma config BOREN = PBOR_ON // PBOR Enable (Enabled)
    #pragma config LPOL = PWMxL_ACT_HI // Low-side PWM Output Polarity (Active High)
    #pragma config HPOL = PWMxH_ACT_HI // High-side PWM Output Polarity (Active High)
    #pragma config PWMPIN = RST_IOPIN // PWM Output Pin Reset (Control with PORT/TRIS regs)
    #pragma config MCLRE = MCLR_EN // Master Clear Enable (Enabled)

    #pragma config GWRP = GWRP_OFF // General Code Segment Write Protect (Disabled)
    #pragma config GCP = CODE_PROT_OFF // General Segment Code Protection (Disabled)

    #pragma config ICS = PGD // Comm Channel Select (Use PGC/EMUC and PGD/EMUD)
    ; #pragma config statements should precede project file includes.
    ; Use project enums instead of #define for ON and OFF.

    ;------------------------------------------------------------------------------
    ; (literals used in code)

    .equ FCY, #7372800 ;Instruction cycle rate (Osc x PLL / 4)
    ;==============================================================================
    ;Start code
    .text ;Start of Code section
    ;------------------------------------------------------------------------------
    ;Initialize stack pointer and limit register
    __reset:
    mov #__SP_init, W15       ;Initialize the Stack Pointer register
    mov #__SPLIM_init, W0    ;Get address at the end of stack space
    mov W0, SPLIM               ;Load the Stack Pointer Limit register
    nop                                ;Add NOP to follow SPLIM initialization
    ; bset.b CORCONL, #PSV

    data: .word 0X12C, 0X258, 0X384,0X4B0,0X5DC,0X708,0X834,0X960,0XA8C,0XBB6,0XA8C,0X960,0X834,0X708,0X5DC,0X4B0,0X384,0X12C

    ;.ascii"helo0"
    ;GOTO INTIALIZATION
    ;------------------------------------------------------------------------------

    ;INTIALIZATION:
    /*
    ;------------TIMER1-----------
    CLR TRISE
    CLR T1CON              ; Stops the Timer1 and reset control reg.
    CLR TMR1                   ; Clear contents of the timer register
    mov #0X63,W0             ; Load the Period register
    MOV w0, PR1              ; with the value 0x8CFF
    BSET IPC0, #T1IP0      ; Setup Timer1 interrupt for
    ;BCLR IPC0, #T1IP1     ; desired priority level
    ;BCLR IPC0, #T1IP2      ; (this example assigns level 1 priority)
    BCLR IFS0, #T1IF        ; Clear the Timer1 interrupt status flag
    BSET IEC0, #T1IE         ; Enable Timer1 interrupts
    ;MOV #0x8020, W0       ; Start Timer1 with prescaler settings
    ;MOV w0, T1CON          ; clock in the synchronous mode
    BSET T1CON,#TON

    ;GOTO MAIN_LOOP

    ;-----------------------------
    */



    MOV #0X12,W0
    MOV W0,0X802


    ;----------TIMER2-------------
    CLR TRISE
    CLR T2CON
    CLR TMR2
    BSET IPC1,#T2IP0
    BCLR IPC1,#T2IP1
    BCLR IPC1,#T2IP2




    ;-----------------------------

    ;-------OUTPUT COMPRE---------
    CLR OC1CON
    MOV #0X0030,W0
    MOV W0,OC1RS
    MOV W0,OC1R

    MOV #0X06,w0
    MOV W0,OC1CON
    BCLR IPC0,#OC1IP0
    BSET IPC0,#OC1IP1
    BCLR IPC0,#OC1IP2


    MOV #0XB0,W0             ;100US->BB8
    MOV W0,PR2



    ;BCLR IFS0,#OC1IF
    ;BSET IEC0,#OC1IE
    ;BSET IEC0,#T2IE
    ;BCLR IFS0,#T2IF

    ;BSET T2CON,#TON
    NOP


    ;-----------------------------


    MAIN_LOOP:

    BTG LATE,#1




    BRA MAIN_LOOP
     


    ;------TIMER1_ISR----------
    __T2Interrupt:

    BTG LATE,#1
    BCLR IFS0, #T1IF              ; Reset Timer1 interrupt flag


    ; User code goes here.

    RETFIE                               ; Return from ISR

    ;--------------------------



    .end
    ;-----------------------------------------------
     
     
    #3
    ft.ovah
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    Re: Dspic30f_clock issue 2020/06/01 07:33:35 (permalink)
    4 (1)
    You can Ignore most of the things, if this is confusing i can write it in C and then show it,Im sure thats still going to give me the same problem but easy to read.
     
     
    #4
    ft.ovah
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    Re: Dspic30f_clock issue 2020/06/02 03:45:08 (permalink)
    0
    Any clues ??
    #5
    RISC
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    Re: Dspic30f_clock issue 2020/06/02 04:00:02 (permalink)
    0
    Hi,
    Please look at these code examples for dsPIC30F2010 :

    https://www.microchip.com/doclisting/TechDoc.aspx?type=codeexamples&productfamily=16-BIT

    In the main.c file of each code examples CE0xx, there are various examples of oscillator settings (internal / external / with or without PLL
    I also attach herewith a very old version of the dsPIC30 FRM about oscillators which contains some tips (just remove the .txt extension to find a zip archive)
    Regards
     
    #6
    RISC
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    Re: Dspic30f_clock issue 2020/06/02 04:02:01 (permalink)
    0
    Sorry the file was to big. You can find it here : http://ww1.microchip.com/...n/devicedoc/70054e.pdf
    #7
    ft.ovah
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    Re: Dspic30f_clock issue 2020/06/02 05:46:47 (permalink)
    0
    Okay thanks ill have a look at report if any questions ! 
    #8
    ft.ovah
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    Re: Dspic30f_clock issue 2020/06/02 10:20:41 (permalink)
    0
    I do have a question,is it possible that i can clock it at roughly 30Mhz or will it be lower then that ?
    #9
    RISC
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    Re: Dspic30f_clock issue 2020/06/02 13:53:33 (permalink)
    4 (1)
    Hi,
    dsPIC30 family can run @ Fcy=30MIPS (i.e. Fosc = 120MHz) : NB : this is the only 16 bits family which has Fcy = Fosc / 4. All other ones (PIc24 / dsPIC33) have Fcy = Fosc /2
    With 7.37MHz and PLLx16 you can reach Fosc = 117.92MHz i.e Fcy = 29.48MIPS.
    I did run dsPIC30 @ this speed several years ago. I have some dsPIC30 but they are in the office...and I work from home . So I can't test...Look at the code examples. I have extensively used them in the past with success
    Regards
    NB : there are some 5V dsPIC33 products (dsPIC33EV) if you need 5V power supply...
    #10
    ft.ovah
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    Re: Dspic30f_clock issue 2020/06/03 02:17:33 (permalink)
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    Hi RISC,
    Im actually giving 5V to this mcu,should that be a problem ? and also did you use a external crystal to run it at 29Mhz or internal ,if External was it a 7.37Mhz crystal ?
    #11
    ft.ovah
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    Re: Dspic30f_clock issue 2020/06/03 02:44:12 (permalink)
    0
     whats happening is that im getting 7.37Mhz output at RE1 at x16PLL  which doesnt make sense with these configurations ,maybe im not giving 3.3V that could be the reason 
     
     
    #include "p30fxxxx.h"
    // FOSC
    #pragma config FPR = XT_PLL16 // Primary Oscillator Mode (XT w/PLL 16x)
    #pragma config FOS = PRI // Oscillator Source (Primary Oscillator)
    #pragma config FCKSMEN = CSW_FSCM_ON // Clock Switching and Monitor (Sw Enabled, Mon Enabled)
    // FWDT
    #pragma config FWPSB = WDTPSB_16 // WDT Prescaler B (1:16)
    #pragma config FWPSA = WDTPSA_512 // WDT Prescaler A (1:512)
    #pragma config WDT = WDT_OFF // Watchdog Timer (Disabled)
    // FBORPOR
    #pragma config FPWRT = PWRT_OFF // POR Timer Value (Timer Disabled)
    #pragma config BODENV = NONE // Brown Out Voltage (Reserved)
    #pragma config BOREN = PBOR_OFF // PBOR Enable (OFF)
    #pragma config LPOL = PWMxL_ACT_HI // Low-side PWM Output Polarity (Active High)
    #pragma config HPOL = PWMxH_ACT_HI // High-side PWM Output Polarity (Active High)
    #pragma config PWMPIN = RST_IOPIN // PWM Output Pin Reset (Control with PORT/TRIS regs)
    #pragma config MCLRE = MCLR_EN // Master Clear Enable (Enabled)
    // FGS
    #pragma config GWRP = GWRP_OFF // General Code Segment Write Protect (Disabled)
    #pragma config GCP = CODE_PROT_OFF // General Segment Code Protection (Disabled)
    // FICD
    #pragma config ICS = PGD // Comm Channel Select (Use PGC/EMUC and PGD/EMUD)
    int main (void);
    int main (void)
    {
                                   
                                     /* You will observe the pin RE1 toggle at a different rate */
    TRISE = 0x0000;        /* Set PORT E pins as output */
    while (1)                    /* Loop endlessly */
    { /* If an Oscillator failure occurs, the device will */
    LATEbits.LATE1 =0;
    LATEbits.LATE1 =1;
    }
     
    }
     
     
     
    post edited by ft.ovah - 2020/06/03 03:06:02
    #12
    RISC
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    Re: Dspic30f_clock issue 2020/06/11 15:23:49 (permalink)
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    Hi,
     
    The attached project blink an LED @1Hz on dsPIC30F3010 (SW is the same for dsPIC30F2010, just change CPU).
    CPU runs @ 29491200 Hz (29.49MHz = 7.37MHz * 16)
    Remove the .txt from the file extension as this is a zip archive from the project
     
    Regards
    #13
    Gort2015
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    Re: Dspic30f_clock issue 2020/06/11 17:32:26 (permalink)
    3 (2)
    On the FJ chips I used this for external/internal xtal setup.
    (Do all the calculations first then a function writes N1, M, N2)
    // ----------------------------------------------------
    #ifdef EXTERNAL_CRYSTAL
    #define FIN 10000000
    #define N1 2    //   0.8 -   8MHz
    #define M 32    // 100   - 200Mhz
    #define N2 2
    #else
    #define FIN 7370000L
    #define N1 8    // 921,250
    #define M 173   // 159,376,250
    #define N2 2    // 79,688,125
    #endif
    #define FOSC (FIN / N1 * M / N2)
    #define FVCO (FIN / N1 * M)
    #define FCY (FOSC / 2)
    #define SAMPLE_RATE 44100L
    #define DACFREQ (SAMPLE_RATE * 256L)
    #define DACDIV (FVCO / DACFREQ)
    // ----------------------------------------------------


    MPLab X playing up, bug in your code? Nevermind, Star Trek:Discovery will be with us soon.
    https://www.youtube.com/watch?v=Iu1qa8N2ID0
    + ST:Continues, "What Ships are Made for", Q's back.
    #14
    Gort2015
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    Re: Dspic30f_clock issue 2020/06/11 17:43:47 (permalink)
    3 (2)
    There's a function I posted on here that tries to match
    a frequency and creates a list including settings.
    Uses the tuner etc..
     
    The FJ's are quite old now.
     
     

    MPLab X playing up, bug in your code? Nevermind, Star Trek:Discovery will be with us soon.
    https://www.youtube.com/watch?v=Iu1qa8N2ID0
    + ST:Continues, "What Ships are Made for", Q's back.
    #15
    ft.ovah
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    Re: Dspic30f_clock issue 2020/06/12 02:57:55 (permalink)
    0
    thankyou all for your kind reply, i will report and answer back asap on this 
    #16
    ft.ovah
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    Re: Dspic30f_clock issue 2020/06/13 01:40:07 (permalink)
    0
    okay so @RISC the file you gave me has some mistakes, like
    #pragma config FOSFPR = FRC_PLL16       // Oscillator (FRC w/PLL 16x)
    which for dspic30f2010 configuration does not exist,secondly your outputing 1Hz at the portE , can you tell me if you know a way to clock at 29Mhz while probing it on your scope, shouldnt this run on lower then 29Mhz because you still have to take into accounts the overheads of the while loop? and also Im using an external crystal of 7.37Mhz,even if i use XT_PLL16 as my configbit option the max i can probe on portE with just simply toggling i get 7.37Mhz on scope .Its as if im actually getting 7.37Mhz X XT_PLL16 = crystal frequency which i dont understand .By the way my crsytal is working fine running at the desired frequency. @Gort i cant really say anything im sorry ,i havent used the dspic33 varients, the old ones are really a problem as i cant use MCC.
    #17
    ft.ovah
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    Re: Dspic30f_clock issue 2020/06/13 01:45:19 (permalink)
    0
    I just wanted to scope the Raw speed of this mcu thats the point, @RISC your using to many intructions and delays for this purpose with due respect. I think as a person im failing to explain what i mean and im sorry if thats true
     
    #18
    ft.ovah
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    Re: Dspic30f_clock issue 2020/06/13 01:49:16 (permalink)
    0
    It is possible to do it i know that much ,even if my crsytal is running on 7.37Mhz it should just multiply that with 16 and output it,instead it just gives me back my crystal frquency.If i use like 7.373MhzXPLL8 it gives me like a clock of 3.0 Mhz
     
    #19
    Gort2015
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    Re: Dspic30f_clock issue 2020/06/13 08:56:48 (permalink)
    5 (1)
    Probably better off using a 10MHz external xtal.
     
    Check N1, M and N2 are in range.

    MPLab X playing up, bug in your code? Nevermind, Star Trek:Discovery will be with us soon.
    https://www.youtube.com/watch?v=Iu1qa8N2ID0
    + ST:Continues, "What Ships are Made for", Q's back.
    #20
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