• AVR Freaks

Hot!Clarification needed on BRG calculation

Author
Maldus
Starting Member
  • Total Posts : 82
  • Reward points : 0
  • Joined: 2016/08/17 09:55:57
  • Location: 0
  • Status: offline
2020/05/27 06:02:40 (permalink)
5 (1)

Clarification needed on BRG calculation

I am working on a PI24EP512GU810 and using its I2C2 module. The family reference manual (http://ww1.microchip.com/downloads/en/DeviceDoc/70000195g.pdf) shows the formula to calculate the value for the I2C2BRG register at page 19.
The formula mentions a "Delay" factor that is "usually" between 110 ns and 130 ns. Is it possible to know exactly what this delay is and what it refers to? I could not find any other mention in the FRM and the Datasheet.
 
More importantly, for my application I configured the MCU to run at 120MHz. This means that the FCY factor used in the above formula is 60'000'000, which results into a BRG value over 511 for a required frequency of 100KHz. Unfortunately the I2C2BRG register is only 9 bits wide, so it's not possible to provide a value > 511.

I can settle for a slightly higher frequency, but does this mean that some I2C clock frequencies are locked to certain system clock values?
#1

2 Replies Related Threads

    picy2620
    Super Member
    • Total Posts : 138
    • Reward points : 0
    • Joined: 2009/11/13 08:12:47
    • Location: Germany
    • Status: offline
    Re: Clarification needed on BRG calculation 2020/05/27 07:45:18 (permalink)
    0
    Someone and me asked the same question in 2012:
    How to get on a dsPIC33E a I2C with 100kHz at full speed FCY 70Mhz ?
    I think there is no real solution to this issue.
     
    picy2620
    #2
    Maldus
    Starting Member
    • Total Posts : 82
    • Reward points : 0
    • Joined: 2016/08/17 09:55:57
    • Location: 0
    • Status: offline
    Re: Clarification needed on BRG calculation 2020/05/27 08:04:15 (permalink)
    0
    picy2620
    Someone and me asked the same question in 2012:
    I think there is no real solution to this issue.
     
    picy2620


    I see. Luckily in my situation I can make do with a slightly higher clock speed but this is a pretty bad design flaw, even for Microchip. Just wanted to make sure its a limitation on their side and not a misunderstanding on mine.
     
    The question about the Delay factor remains open though. What is it and why it's never mentioned again in the FRM or datasheet (besides poor documentation)?
    #3
    Jump to:
    © 2020 APG vNext Commercial Version 4.5