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Hot!16LF1825 sleep-current x1000 when INT-pin on Vss in stead of Vdd

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elac@online.be
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2020/03/29 05:48:03 (permalink)
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16LF1825 sleep-current x1000 when INT-pin on Vss in stead of Vdd

Hi all
I've set-up a PIC 16LF1825 to sleep. The INT-pin (RA2) is configured to wake-up the PIC from sleep.
When INT goes high, the PIC does some things (with MRF24J40MA) and then enters sleep mode again till INT goes low. When INT goes low, the PIC does some other things and enters sleep mode again till INT goes high... and so on.
 
There is a reed-switch SPDT connected to the INT-pin (see attachment).
  • When the PIC sleeps when INT-pin is tied to Vdd, the current is about 50nA. Excellent.
  • However if the PIC is in sleep-mode with the INT-pin tied to Vss, the current drawn from the battery is 40µA !!
 
I already tried disabling the pull-up for INT-pin  but it doesn't help...
Any ideas ?
 
Thanks for reading...

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#1

16 Replies Related Threads

    elac@online.be
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    Re: 16LF1825 sleep-current x1000 when INT-pin on Vss in stead of Vdd 2020/03/29 05:52:29 (permalink)
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    Update.
    When I detached the logic analyzer, readings are some changed:
    • current drawn from battery when INT = Vdd : 22nA.
    • current drawn from battery when INT = Vss : 32µA.
    #2
    mbrowning
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    Re: 16LF1825 sleep-current x1000 when INT-pin on Vss in stead of Vdd 2020/03/29 06:40:31 (permalink)
    +1 (1)
    Internal pullup turned on for RA2?
    #3
    elac@online.be
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    Re: 16LF1825 sleep-current x1000 when INT-pin on Vss in stead of Vdd 2020/03/29 07:13:09 (permalink)
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    Hi
    Pull-ups are disabled by default. However I followed you because the current matches the datasheet Ipu parameter.
     
    In fact, enabling or disabling pull-up for RA2 does not makes any difference.
    For disabling I do:
    // Datasheet : Global WPUEN bit of the OPTION_REG register must be cleared for individual pull-ups to be enabled.
    OPTION_REG&=0b01111111; // Weak pull-ups are enabled by individual WPUx latch values
    WPUA&=0b11111011; // Disable pull-up for ReedContact
     
    #4
    crosland
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    Re: 16LF1825 sleep-current x1000 when INT-pin on Vss in stead of Vdd 2020/03/29 07:24:31 (permalink)
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    Do you have anything else besides the logic analyser connected to the INT pin?
    #5
    elac@online.be
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    Re: 16LF1825 sleep-current x1000 when INT-pin on Vss in stead of Vdd 2020/03/29 07:30:38 (permalink)
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    Hi
    Nothing else
    #6
    mbrowning
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    Re: 16LF1825 sleep-current x1000 when INT-pin on Vss in stead of Vdd 2020/03/29 07:37:54 (permalink)
    +1 (1)
    elac@online.be
    In fact, enabling or disabling pull-up for RA2 does not makes any difference.

    Then something is wrong in code or hardware. If RA2 pullup is truly enabled it will pull additional current.
    #7
    crosland
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    Re: 16LF1825 sleep-current x1000 when INT-pin on Vss in stead of Vdd 2020/03/29 07:45:32 (permalink)
    +1 (1)
    Rather than comparing the sleep current between two pin states, how does it compare to the data sheet value?
     
    I may be looking in the wrong place (I never use sleep mode) and shooting in the dark. The headline claim is indeed 20nA at 1.8V but 30.3 in the data sheet shows nothing less than a few uA for sleep current. I can't find anything in the electrical specs that gives the sleep current as 20nA. Somoen please educate me :)
     
    What other peripherals are still enabled when you enter sleep mode? BOR? Oscillator?
     
    What's your Vdd?
    #8
    davea
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    Re: 16LF1825 sleep-current x1000 when INT-pin on Vss in stead of Vdd 2020/03/29 08:19:03 (permalink)
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    have you disconnected the reed switch
    and measured the voltage on the pin ?   
    #9
    elac@online.be
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    Re: 16LF1825 sleep-current x1000 when INT-pin on Vss in stead of Vdd 2020/03/29 08:22:45 (permalink)
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    >This is true, the difference is about 3µA.
     
    #10
    elac@online.be
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    Re: 16LF1825 sleep-current x1000 when INT-pin on Vss in stead of Vdd 2020/03/29 08:24:54 (permalink)
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    Hi all
     
    I broke the reed-switch (glass) and had to replace it.
    The '0'-current is now only 450nA, so there is surely a quality problem in the story !
    (thanks ALI-Express for this one)
     
    I'll keep in touch with updates.
    #11
    mbrowning
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    Re: 16LF1825 sleep-current x1000 when INT-pin on Vss in stead of Vdd 2020/03/29 09:05:29 (permalink)
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    crosland
    I may be looking in the wrong place (I never use sleep mode) and shooting in the dark. The headline claim is indeed 20nA at 1.8V but 30.3 in the data sheet shows nothing less than a few uA for sleep current. I can't find anything in the electrical specs that gives the sleep current as 20nA. Somoen please educate me :)
    Spec D022 says .02uA (20nA) typical for LF parts.
     
    #12
    crosland
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    Re: 16LF1825 sleep-current x1000 when INT-pin on Vss in stead of Vdd 2020/03/29 11:58:40 (permalink)
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    mbrowning
    Spec D022 says .02uA (20nA) typical for LF parts.

     
    Ah, I was looking at the max column.
    #13
    elac@online.be
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    Re: 16LF1825 sleep-current x1000 when INT-pin on Vss in stead of Vdd 2020/03/29 23:52:09 (permalink)
    +2 (2)
    Hi all
    Poor SPDT reed-switch quality was definitely the source of my problems.
    • The first contact had huge leakage current between NC and NO (with magnet)
    • The second one has tri-state when magnet comes some closer
    • other ones broke glass when pins where bend to fit the PCB
    The price-difference is huge (€0.3/pc on ALI vs €2.72/pc on sinuss). I'll stick with ALI but test the switch before soldering other PCB's.
    Attached the final product (project started in 2018 lol - thanks to corona I finaly found some time to finish it).
    It's a wireless door contact, part of domestic system, to detect door & window open/cose (shutting off heating and accessory anti-burglar alarm).
     
    I would like to thank all participants that contributed to this post!
    post edited by elac@online.be - 2020/03/29 23:53:48

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    #14
    elac@online.be
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    Re: 16LF1825 sleep-current x1000 when INT-pin on Vss in stead of Vdd 2020/03/31 14:25:09 (permalink)
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    I still have a strange behavior that I cannot find an explanation for...
    In the story, I removed the reed-relais and replaced it with a simple wire.
    Internal pull-up's are disabled.
     
    * The INT-pin tied to Vdd gives me 20nA of sleeping current.
    * When I tie de pin to Vss (with a wire) the sleeping current goes up to 8µA and unstable...
     
    sad: sad
    #15
    ric
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    Re: 16LF1825 sleep-current x1000 when INT-pin on Vss in stead of Vdd 2020/03/31 14:39:30 (permalink)
    +1 (1)
    Sounds like it's generating interrupts, so waking your PIC up often.
     

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    #16
    elac@online.be
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    Re: 16LF1825 sleep-current x1000 when INT-pin on Vss in stead of Vdd 2020/04/01 00:46:43 (permalink)
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    Hi Ric,
    For testing I do :
    1. setup clock
    2. disable pullups
    3. set I/O pins not to float
    4. SLEEP();
    No IRQ's are enabled. The current is quite fluctuating, meaning some switching must be done inside the PIC.
    The current now is 3µA (fluctuating +15 -1µA)
    When pull-ups are enabled the current goes up to about 200µA (meaning 2 inputs are grounded)
    Power-saving circuitry .... It stays a very nasty thing for a hobbyist.
     
    #17
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