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Hot!I2C Firmware Controlled Master mode???

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Antimatter
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2020/02/23 09:41:11 (permalink)
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I2C Firmware Controlled Master mode???

What is the difference between I2C Firmware Controlled Master mode and I2C Master mode, clock = (FOSC/4) x (SSPxADD + 1)?

I2C Firmware Controlled Master mode is mentioned 2 times in the datasheet (DS39762F) but no description. What firmware are they talking about?


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    ric
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    Re: I2C Firmware Controlled Master mode??? 2020/02/23 12:14:54 (permalink)
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    You can regard "Firmware controlled Master mode" the same as "Bit banging".
    i.e. you have to manually control SDA and SCL to create all the timing yourself.
    All the peripheral does is monitor those lines to detect if the most recent state change sent was a START or a STOP.
    This mode is only there to provide compatability with older PICs that did not have full Master mode.
    (I'm guessing you are looking at a PIC16F87x datasheet, which was one of the first PICs to have the full Master mode. Please, ALWAYS reveal which PIC you are talking about when asking quesitons about the datasaheet.)
     

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    Antimatter
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    Re: I2C Firmware Controlled Master mode??? 2020/02/23 17:46:10 (permalink)
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    The DS39762F datasheet is for the 18F97J60. I'm interfacing it as a master with a dsPIC33CK64MP102 running as a slave. Having difficulties ... I may need to do some bit banging.
    #3
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