Passing Macro Definitions to Makefile in command line
I am attempting to automate the build process for a project with several build variations, my current procedure is to manually add the Definitions into the Preprocessor Macros menu in Project Properties. I would like to transition from this method to running builds using solely the command line and passing these Macro definitions as arguments to the makefile so I can then write batch scripts.
Currently the command I am using to run the build in windows cmd is:
make -f nbproject/Makefile-<configuration>.mk SUBPROJECTS= .build-conf
The Definition I would be passing would be 'ENABLE_X'
Does anyone know where to place the additional macro definitions around this statement (if this is the correct approach), and if there is any additional formatting that is required..?
I am using XC32 v1.40