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Hot!Passing Macro Definitions to Makefile in command line

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apackmen
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2020/02/20 01:34:33 (permalink)
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Passing Macro Definitions to Makefile in command line

Hello,
I am attempting to automate the build process for a project with several build variations, my current procedure is to manually add the Definitions into the Preprocessor Macros menu in Project Properties. I would like to transition from this method to running builds using solely the command line and passing these Macro definitions as arguments to the makefile so I can then write batch scripts.
Currently the command I am using to run the build in windows cmd is:
make -f nbproject/Makefile-<configuration>.mk SUBPROJECTS= .build-conf
The Definition I would be passing would be 'ENABLE_X'
Does anyone know where to place the additional macro definitions around this statement (if this is the correct approach), and if there is any additional formatting that is required..?
I am using XC32 v1.40
#1

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    crosland
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    Re: Passing Macro Definitions to Makefile in command line 2020/02/20 04:45:28 (permalink)
    +3 (3)
    Not so straightforward if you don't want to edit the makefile https://stackoverflow.com/questions/9052792/how-to-pass-macro-definition-from-make-command-line-arguments-d-to-c-source
     
    If you are ditching the IDE then just write your own makefile.
    #2
    aschen0866
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    Re: Passing Macro Definitions to Makefile in command line 2020/02/20 08:31:17 (permalink)
    +1 (1)
    Are you aware that each <configuration> emits a macro definition as XPRJ_<configuration>? 
    #3
    apackmen
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    Re: Passing Macro Definitions to Makefile in command line 2020/02/20 08:59:16 (permalink)
    +1 (1)
    aschen0866
    Are you aware that each <configuration> emits a macro definition as XPRJ_<configuration>? 


    No, would you care to elaborate?
    #4
    aschen0866
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    Re: Passing Macro Definitions to Makefile in command line 2020/02/20 13:03:17 (permalink)
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    Run the attached project, which has two build configurations TEST1 and TEST2.

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