Finally, i got a workaround solution from official Microchip support.
"It may be possible that there is an issue inside the EZBL generation procession that involved changes within the compiler. We encountered one single issue similar to this and we are currently working on it.
As a workaround, in the Bootloader project, try removing the EZBL_SET_CONF() macro calls in the hardware initialization file and replace them with #pragma config statements generated by MPLAB X IDE. Minimally, the config bits in the FSEC register need to be defined with #pragma config statements instead of EZBL_SET_CONF()."
So, this HW init code was solved my problem and now i am able to upload well "ex_app_led_blink" application example to EZBL bootloader.
#if defined(EZBL_BOOT_PROJECT) // Compiling for a Bootloader Project
// FSEC register need to be defined with #pragma config statements instead of EZBL_SET_CONF()
//EZBL_SET_CONF(_FSEC, BWRP_OFF & BSS_DISABLED & BSS2_OFF & GWRP_OFF & GSS_DISABLED & CWRP_OFF & CSS_DISABLED & AIVTDIS_DISABLE)
// _FSEC(x) legacy macro works
//_FSEC( BWRP_OFF & BSS_DISABLED & BSS2_OFF & GWRP_OFF & GSS_DISABLED & CWRP_OFF & CSS_DISABLED & AIVTDIS_DISABLE )
// #pragma config statements for Bootloader read-back verification failure bugfix: https://www.microchip.com/forums/m1128347.aspx
#pragma config BWRP = OFF
#pragma config BSS = DISABLED
#pragma config BSS2 = OFF
#pragma config GWRP = OFF
#pragma config GSS = DISABLED
#pragma config CWRP = OFF
#pragma config CSS = DISABLED
#pragma config AIVTDIS = DISABLE
EZBL_SET_CONF(_FOSCSEL, FNOSC_FRC & IESO_OFF)
EZBL_SET_CONF(_FOSC, POSCMD_XT & OSCIOFNC_ON & IOL1WAY_OFF & FCKSM_CSECME & PLLKEN_ON) // 8.000MHz XT crystal oscillator, allow multiple PPS remappings, enable clock switching and fail safe clock monitor, wait for PLL lock
EZBL_SET_CONF(_FWDT, WDTPOST_PS1024 & WDTPRE_PR32 & FWDTEN_ON_SWDTEN & WINDIS_OFF & WDTWIN_WIN75)// ~1024ms timeout when watchdog is turned on in software (not forced on in hardware), use ordinary (non-windowed) Watchdog Timer mode
//EZBL_SET_CONF(_FICD, ICS_PGD3) // For external 6-pin PICkit header
EZBL_SET_CONF(_FICD, ICS_PGD1) // For onboard PKOB Programmer/Debugger
EZBL_SET_CONF(_FDEVOPT, PWMLOCK_OFF & ALTI2C1_OFF)
#else // Compiling for an Application Project (EZBL_BOOT_PROJECT is not defined)
EZBL_SET_CONF(_FALTREG, CTXT2_IPL7 & CTXT2_IPL6) // Do assign a context register set to IPL4 (or whatever you have your NOW Timer set to)
#endif // Goes to: #if defined(EZBL_BOOT_PROJECT)
post edited by Benjamin_hu - 2020/02/24 10:39:22