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Hot!PIC12F675 TMR0 workaround from 'missing' start/stop bit.

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vinyl_theif
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2020/01/24 12:46:17 (permalink)
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PIC12F675 TMR0 workaround from 'missing' start/stop bit.

Using an old PIC12F675 for another quick timer project I notice that with the Timer-zero interrupt disabled (T0IE = 0), it's flag (T0IF ) still gets set when the timer overflows, which seems rather strange?
 
Without any timer start/stop bit available I've just set the OPTION_REG clock-source bit (T0CS) as GP2/INT pin, as opposed to instruction cycle clock.
 
I was curious why Microchip designed it as such, any one?...
 
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    Kiwi Mike AZ
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    Re: PIC12F675 TMR0 workaround from 'missing' start/stop bit. 2020/01/24 13:07:24 (permalink)
    +1 (1)
    The Interrupt Flags, T0IF in your case, will always get set on an event no matter if the interrupt (T0IE) is enabled or not.
     
    This allows you to use the flag in a software loop as well to check if an event has happened without the need for an ISR. This is very useful.
     
    This is common across most Microchip PIC parts and peripherals, and why it is important to always clear the appropriate IF flag before enabling the interrupt.
    post edited by Kiwi Mike AZ - 2020/01/24 13:09:09
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    ric
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    Re: PIC12F675 TMR0 workaround from 'missing' start/stop bit. 2020/01/24 13:28:02 (permalink)
    +1 (1)
    vinyl_theif
    Using an old PIC12F675 for another quick timer project I notice that with the Timer-zero interrupt disabled (T0IE = 0), it's flag (T0IF ) still gets set when the timer overflows, which seems rather strange? Without any timer start/stop bit available I've just set the OPTION_REG clock-source bit (T0CS) as GP2/INT pin, as opposed to instruction cycle clock. I was curious why Microchip designed it as such, any one?... 

    As Kiwi Mike just said, that is entirely normal, and how all the PIC12F, 16F and 18F devices work.
    It would make the peripheral very much LESS useful if you could not poll the xxIF flags.
    They do not actually trigger a jump to the ISR unless the matching xxIE flag is also set.
    So, if T0IE is not set, TMR0 won't generate ISRs. There's no need to do any shenanigans to stop the timer.
     
    Stated another way, the purpose of the xxIE flags is NOT to stop xxIF flags getting set, it is a gate AFTER xxIF which enables/disables it actually generating an interrupt.
    If you read back through the interrupt chapter, it does explain this is how it works.
    post edited by ric - 2020/01/24 13:30:26

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    pcbbc
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    Re: PIC12F675 TMR0 workaround from 'missing' start/stop bit. 2020/01/24 15:57:00 (permalink)
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    ...and it’s not just Microchip parts. It’s a very common hardware design to have flag registers (set regardless when a certain event occurs) and enable registers (control if an interrupt is actually raised or not).
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    mpgmike
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    Re: PIC12F675 TMR0 workaround from 'missing' start/stop bit. 2020/01/26 08:43:21 (permalink)
    +1 (1)
    Since the early days of PICs, Timer 0 was defined as running constantly.  You can alter the clock, reset the counter register (TMR0 = 0), trigger an interrupt, poll the TMR0IF, or even just read the TMR0 register for a reference.  If you need to stop the Timer, use a Timer 2/4/6 or 1/3/5 type.

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