Re: Most recent errata sheet for PIC18F67K40
Read the freaking datasheet.
T0ASYNC cleared means that the input clock is syncronized with the system clock (Fosc/4). If you try to sync the clock with itself there will be issues (i assume missed cycles)
I would have just written on the datasheet "keep bit set when using System clock as a source" or something but they preferred to put it in the errata for some reason.
Anyway, it's an issue with a workaround and the workaround is just clearing a bit and forgetting about it, so no issue at all.