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Hot!ZCD troubles

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davea
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2020/01/18 17:28:05 (permalink)
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ZCD troubles

Hi, everyone
16LF15325
I am trying to get a stable 60Hz out to TMR2 with PR = 59 (1 sec ISR)
but it does extra triggers
I used the recommend 3.3k ohm per 1 volt peek
I've add an RC lo pass still false triggers to timer
the only thing that fix's it is adding 100pF from ZCD input to GND
is that a valid fix or should it not need it ??
it does uses a unconventional Power supply
and while working on I have a 120 V isolation transformer to
to allow grounding of the virtual GND 
  
  

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#1

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    acharnley
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    Re: ZCD troubles 2020/01/19 06:38:21 (permalink)
    +1 (1)
    The ZCD uses a constant current source which is pulled/pushed by resistor and a comparator to check when the voltage equals a certain point. It only has a circa 30V delta working range. I know you can add resistors to change the phase but capacitors I'm not sure about. If by way of unconventional you mean a low impedance power supply which violates the range then don't use the ZDC at all.

    If you merely wish to ignore noise, then the best solution I've had is to feed the ZCD into the CWG, setting deadband on the leading & trailing edge. Optionally feed this into a CLC and into Timer 2 set for monostable mode (the CWG can't be fed in directly hence the CLC). Timer 2 has a natural debounce mechanism of several CPU cycles. The CWG only works of FOSC & HSINTOSC which may limit your CPU frequency to get the right deadband values for your signal.
    #2
    davea
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    Re: ZCD troubles 2020/01/19 22:52:07 (permalink)
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    thanks for the reply acharnley  
    it got me thinking is this what you had in mind...
    also I should be able to use only 1 output and keep it at 60Hz 
    any help is welcome
    thanks davea
     
     

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    acharnley
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    Re: ZCD troubles 2020/01/20 02:15:50 (permalink)
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    That's it, it worked for me but the timings of the CWG/TMR2 have to be right to debounce whatever noise you're getting. It's not ideal, the CWG and TMR2 isn't natively routed which wastes 2xCLC's.

    Another option could be to set the DAC at 0.1v and use a comparator, that'll give you higher range. You can then use filters on the input side.
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    davea
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    Re: ZCD troubles 2020/01/20 13:07:37 (permalink)
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    Hi everyone
    things are not looking good
    the LF15325 does not have a CWG1ISM register
    so changed to a LF15324 data sheet shows it is there
    REGISTER 30-9: CWG1ISM: CWG1 INPUT SELECTION REGISTER
    but it does not exist or its not defined in IDE v5.3 or latest MCC...
    I really don't waste a pin for a tie point
    also not sure this is going to work in the end...
    need some help
    thanks davea
     
      
     
    #5
    ric
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    Re: ZCD troubles 2020/01/20 14:40:44 (permalink)
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    The PIC16F devices that do have a CWG1ISM register have it at address 0x60D.
    Your two devices have a register at that address named CWG1DAT, which is mentioned as occupying that address, but there is no further documentation for that register.
    I suspect that CWG1DAT and CWG1ISM are two names for the same thing, and someone at Microchip got confused...
     

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    #6
    davea
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    Re: ZCD troubles 2020/01/21 17:19:38 (permalink)
    +1 (1)
    Ok more info on this problem
    the way MCC does the setup for CWG is RA2
    and ZCD is also RA2 (chained input for both and setting CWG1DAT = 0x07 NCO
    does not remove the chain)
    testing, started new project
    setup NCO at 120 Hz
    setup CWG with NCO as input worked fine...
    took out  //CWG1PPS = 0x02;   //RA2->CWG:CWG1IN;
    setup ZCD 60 Hz at input
    setup CLC to route ZCD to CWG and it went dead...
    set it back to NCO , fine working again 120 Hz
    sent the out of CLC to a pin, it was DEAD 
    there must be a BIG BUG in MCC...
    and I don't where/how to search for it
    any help welcome davea
    ric you were correct wink: wink
    zip file to big 600k to attach mad: mad
     
     
    #7
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