RISC, Reduced Instruction Set Computer (CPU)
is a term that was invented and used when MIPS32 and similar CPU architectures was designed.
and the MIPS32 that is used in PIC32, is one of the most typical RISC processors that exist.
Forerunners of the PIC16 were designed even before the RISC term was invented,
and although there may be some similarities, there are much more differences from RISC principles.
A CPU that need 4 clock cycles to perform one instruction at a time,
and is designed to read a word from memory, perform a logic or arithmetic operation,
and store the result back in memory or SFR register, in a single instruction,
is Not a RISC processor in my understanding.
Microchip is trying to twist the RISC term into meaning a computer with a small number of instructions,
that is reasonably easy to understand and use in assembly programming,
and because it is a popular term to use in marketing.
The original priorities of RISC Instruction set and Processor design were quite different,
with emphasis on creating hardware that could run with high clock frequency,
even if it would require a optimizing compiler for the intended use.
In some ways, a PIC10, PIC12, PIC16 or PIC18 may be regarded as just one large CPU,
with all RAM memory and SFR control registers beeing registers in the CPU.
This is different from a CPU with interface to external memory.
The ability to increment a SFR register or a memory location in a single instruction that cannot be interrupted,
is a very convinient feature in a PIC16 or PIC18 microcontroller,
and single instruction access to SFR registers is valuable in dealing with peripherals.
But this doesn't scale to well into larger memory and higher clock frequency.
In the latest PIC18FxxK42 there is extra trickery used to reach beyond 64 kByte program memory
and beyond 4 kByte RAM and SFR memory. But this is more a limitation of short instruction word size.
PIC24 and dsPIC devices use very much the same design principles as 8 bit PIC microcontrollers.
There is wider data bus at 16 bits, and 24 bit instruction word size, 16 accumulator registers,
and more computing hardware in the CPU,
with hardware to perform multiplication and division, plus signal processing hardware in the ds models.
Also there are more Interrupt priority levels than in PIC18, and a lot of fancy peripherals in some models.
There is still 4 steps in execution of each instruction, just that there is a DDR clock system in use,
using both Low and High half period of each clock cycle for doing something different.
It is in my opinion impressive what PIC24 and dsPIC33 devices can do at 70 Million instructions/second to
90 and 100 Million Instructions/second, with clock frequencies 140 MHz up to 200 MHz.
There is then extra trickery needed when reaching beyond 32 kByte or 64 kByte memory.
AVR microcontrollers, that are now Microchip was designed as RISC processors.
post edited by Mysil - 2019/12/11 11:30:13