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Hot!Ext OSC Issue

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mpgmike
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2019/12/09 16:53:21 (permalink)
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Ext OSC Issue

dsPIC33EP256MU806
MPLABX v5.30
Windows 10
XC16 v1.41
 
When I first power up the board, I have my 8 MHz oscillator signal to the external crystal.  However, within about 5 seconds, the amplitude diminishes to nothing.  Here are my OSC related SFRs & CONFIGs:

#pragma config FNOSC = PRIPLL // Initial Oscillator Source Selection bits (Primary Oscillator (XT, HS, EC) with PLL)
#pragma config IESO = ON // Two-speed Oscillator Start-up Enable bit (Start up device with FRC, then switch to user-selected oscillator source)
// FOSC
#pragma config POSCMD = XT //Dev Board Setting, 4 MHz >> 10 MHz
//#pragma config POSCMD = HS // Primary Oscillator Mode Select bits (HS Crystal Oscillator Mode)
#pragma config OSCIOFNC = OFF // OSC2 Pin Function bit (OSC2 is clock output)
#pragma config IOL1WAY = OFF // Peripheral pin select configuration (Allow multiple reconfigurations)
#pragma config FCKSM = CSECMD //Dev Board Setting, Clock Switching enabled, Fail Safe disabled
//#pragma config FCKSM = CSDCMD // Clock Switching Mode bits (Both Clock switching and Fail-safe Clock Monitor are disabled)
// -=- Oscillator Related SFRs, 8 MHz Crystal: -=-
PLLFBD = 38; /* M = 60 */
CLKDIVbits.PLLPOST = 0; /* N1 = 2 */
CLKDIVbits.PLLPRE = 0; /* N2 = 2 */
OSCTUN = 0;
// Fosc = 8,000,000 * (60 / (2 * 2)) = 120 MHz
__builtin_write_OSCCONH(0x03); //
__builtin_write_OSCCONL(0x01); //
while (OSCCONbits.COSC != 0x3); //
ACLKCON3 = 0x24C1; //
ACLKDIV3 = 0x7; //
ACLKCON3bits.ENAPLL = 1; //
while(ACLKCON3bits.APLLCK != 1); //

 
What am I doing wrong?

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I don't need the world to know my name, but I want to live a life so all my great-grandchildren proudly remember me.
#1

7 Replies Related Threads

    MBedder
    Circuit breaker
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    Re: Ext OSC Issue 2019/12/09 17:04:59 (permalink)
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    Why are you doing the two-speed startup with 8 MHz crystal when you can simply start with PRIPLL selected by config bits?
    #2
    du00000001
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    Re: Ext OSC Issue 2019/12/09 17:07:11 (permalink)
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    I'd try POSCMD = HS
    IIRC, I recently fell into the same pothole  :(

    PEBKAC / EBKAC / POBCAK / PICNIC (eventually see en.wikipedia.org)
    #3
    mpgmike
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    Re: Ext OSC Issue 2019/12/09 17:30:25 (permalink)
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    Tried it with IESO = ON and OFF
     
    Tried it with POSCMD = XT and HS
     
    Tried it with IESO = ON, POSCMD = HS
         IESO = OFF, POSCMD = HS
         IESO = ON, POSCMD = XT
         IESO = OFF, POSCMD = XT
     
    I'm beginning to think it might be a hardware issue.  The oscillator Data Sheet for the crystal calls for 18 pF.  Microchip's dsPIC33EP Data Sheet calls for a 1M resistor between OSC1 & OSC2.  I tried it with and without that 1M resistor.  I've been fighting this project for 2 months.  I had a new PCB made (at over $300 US) because I was burning up PICs with the old one.  I spaced things further apart to eliminate solder slobber (I had 4 pins shorted to their neighbor).
     
    I'm open to the next suggestion, which I'll try.  Thank you MBedder and du... for your suggestions.  You both may be right, but there is still a further issue.
    post edited by mpgmike - 2019/12/09 17:31:36

    I don't need the world to know my name, but I want to live a life so all my great-grandchildren proudly remember me.
    #4
    du00000001
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    Re: Ext OSC Issue 2019/12/09 18:46:09 (permalink)
    0
    Would be great if you could post your schematics (maybe via PM?).
    The design I have works without an external feedback resistor (the 1 M thing).
    But if your quartz specified CL = 18 pF, you'll need 2 caps about 33 pF each. If CL is different: please provide the value! (I can easily calculate the cap values required.)
     
    More to follow some time later this day (my day)...

    PEBKAC / EBKAC / POBCAK / PICNIC (eventually see en.wikipedia.org)
    #5
    JPortici
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    Re: Ext OSC Issue 2019/12/10 03:11:40 (permalink)
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    MBedder
    Why are you doing the two-speed startup with 8 MHz crystal when you can simply start with PRIPLL selected by config bits?




    This means you trust the POR values for the PLL, which are correct for 8MHz and whereabouts.
    I've had issues in the past because of that, so i ALWAYS start with FRC, set up the PLL then try to switch. on a failure i retry to switch, on a second failure i run from FRCPLL and signal the event
     
    @OP: 8MHz definetly needs HS, but have you tried a different crystal? Altough these days i prefer to use a MEMS oscillator
    #6
    du00000001
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    Re: Ext OSC Issue 2019/12/10 06:10:16 (permalink)
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    Now I dug somewhat in my old project (configured per MCC, partly manually modified).
    What is to be mentioned: this configuration is for a 20 MHz quartz. So your divider values will be different. I recommend to use MCC to get this right. Just make sure FVCO is within the 120 .. 340 MHz band.
     
    // FOSC
    #pragma config POSCMD = NONE //Primary Oscillator Mode Select bits->Primary Oscillator disabled
    #pragma config OSCIOFNC = OFF //OSC2 Pin Function bit->OSC2 is clock output
    #pragma config IOL1WAY = ON //Peripheral pin select configuration->Allow only one reconfiguration
    #pragma config FCKSM = CSECMD //Clock Switching Mode bits->Clock switching is enabled,Fail-safe Clock Monitor is disabled
    // FOSCSEL
    #pragma config FNOSC = FRC //Oscillator Source Selection->FRC
    #pragma config IESO = ON //Two-speed Oscillator Start-up Enable bit->Start up device with FRC, then switch to user-selected oscillator source

    IOL1WAY could be OFF as well,
     
    void CLOCK_Initialize(void)
    {
    // FRCDIV FRC/1; PLLPRE 2; DOZE 1:8; PLLPOST 1:2; DOZEN disabled; ROI disabled;
    CLKDIV = 0x3000;
    // TUN Center frequency;
    OSCTUN = 0x00;
    // ROON disabled; ROSEL FOSC; RODIV 0; ROSSLP disabled;
    REFOCON = 0x00;
    // PLLDIV 63;
    PLLFBD = 0x3F;
    // AD1MD enabled; T3MD enabled; T4MD enabled; T1MD enabled; U2MD enabled; T2MD enabled; U1MD enabled; SPI2MD enabled; SPI1MD enabled; T5MD enabled; I2C1MD enabled;
    PMD1 = 0x00;
    // IC4MD enabled; IC3MD enabled; OC1MD enabled; IC2MD enabled; OC2MD enabled; IC1MD enabled; OC3MD enabled; OC4MD enabled;
    PMD2 = 0x00;
    // CMPMD enabled; CRCMD enabled; I2C2MD enabled;
    PMD3 = 0x00;
    // CTMUMD enabled; REFOMD enabled;
    PMD4 = 0x00;
    // PTGMD enabled; DMA0MD enabled;
    PMD7 = 0x00;
    // CF no clock failure; NOSC FRCPLL; CLKLOCK unlocked; OSWEN Switch is Complete;
    __builtin_write_OSCCONH((uint8_t) (0x01));
    __builtin_write_OSCCONL((uint8_t) (0x01));
    // Wait for Clock switch to occur
    while (OSCCONbits.OSWEN != 0);
    while (OSCCONbits.LOCK != 1);
    }


    PEBKAC / EBKAC / POBCAK / PICNIC (eventually see en.wikipedia.org)
    #7
    T Yorky
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    Re: Ext OSC Issue 2019/12/11 11:46:53 (permalink)
    5 (1)
    @mpgmike,
    Your config is start on PRImary PLL. Then you start adjusting the dividers for the clock and then change to PRImary PLL which is already active.
    You should not be adjusting the clock while running from it. Any changes are instant and upset the PLL.
     
    Start on FRC. Then adjust the divisors (ensuring the combination is valid). Then initiate a change to the PLL clock.
     
    T Yorky
    #8
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