• AVR Freaks

Hot!Low frequency & High frequency at same time for different timer ?

Author
karsen
Starting Member
  • Total Posts : 67
  • Reward points : 0
  • Joined: 2012/02/07 01:49:31
  • Location: Bangalore
  • Status: offline
2019/12/05 23:13:02 (permalink)
0

Low frequency & High frequency at same time for different timer ?

Hi,
I m using pic18f25q10. I want to use 32Khz for timer 0 and 1 Mhz for timer 1? Is it possible to do? 
When i tried to code only the timer 0 is working correctly (timer value  1 sec), but the timer 1 is not working correctly. 
 
Thanks.
#1

4 Replies Related Threads

    NorthGuy
    Super Member
    • Total Posts : 6219
    • Reward points : 0
    • Joined: 2014/02/23 14:23:23
    • Location: Northern Canada
    • Status: offline
    Re: Low frequency & High frequency at same time for different timer ? 2019/12/06 08:40:11 (permalink)
    0
    karsen
    I m using pic18f25q10. I want to use 32Khz for timer 0 and 1 Mhz for timer 1? Is it possible to do?



    If you mean timer period then no. Timer 1 is a 16-bit timer which will overflow every 65536 ticks, so at 64 MHz, the minimum timer period is 1.024 ms. Use timer 2 instead. It has the PR regisister which lets you create shorter periods. However, if you want to create an ISR, 1 MHz is probably too fast, for C code anyway.
    #2
    dan1138
    Super Member
    • Total Posts : 3713
    • Reward points : 0
    • Joined: 2007/02/21 23:04:16
    • Location: 0
    • Status: offline
    Re: Low frequency & High frequency at same time for different timer ? 2019/12/06 13:05:24 (permalink)
    +1 (1)
    karsen
    Using the PIC18F25Q10 I want to use 32Khz for timer 0 and 1 Mhz for timer 1? Is it possible to do?

    The question as you have asked it is too ambiguous.
     
    Please clarify what you need:
     
    Is it to supply a 32KHz clock to TIMER0 and a 1MHz clock to TIMER1 were each timer assert a rollover event once per second?
     
    Or:
     
    Have TIMER0 assert rollover events at a 32KHz rate and TIMER1 to assert rollover events at a 1MHz rate?
    #3
    karsen
    Starting Member
    • Total Posts : 67
    • Reward points : 0
    • Joined: 2012/02/07 01:49:31
    • Location: Bangalore
    • Status: offline
    Re: Low frequency & High frequency at same time for different timer ? 2019/12/11 01:01:43 (permalink)
    0
    dan1138
    karsen
     
    Have TIMER0 assert rollover events at a 32KHz rate and TIMER1 to assert rollover events at a 1MHz rate?


    Yes. I want TIMER0 run on 32KHZ rate and TIMER1 run on 1 Mhz rate. 
    #4
    Mysil
    Super Member
    • Total Posts : 3676
    • Reward points : 0
    • Joined: 2012/07/01 04:19:50
    • Location: Norway
    • Status: offline
    Re: Low frequency & High frequency at same time for different timer ? 2019/12/11 07:32:58 (permalink)
    0
    Hi,
    Yes, I am sure it can be done,
    but Not without some wery detailed reading of the datasheet,
    and careful coding. 
     
    There are new features available in Timer 0,
    in PIC18F25Q10  and some other new families like PIC18FxxK42, and PIC18FxxK83.
    Among other, Datasheet claim that Timer 0 may operate in Sleep mode when Secondary Crystal OScillator (SOSC) is selected as clock input to the timer. 
    Timer 0 may now operate as a Period Timer when running in 8 bit mode,
    by using TMR0H as Period Register.
    Timer 0 in these new devices have a very large Prescaler range.
    Also, with these devices, there are now possibilities to chain hardware timers together,
    by selecting rollover event in one timer, as clock input in another timer.
    So it may possibly be done entirely in hardware.
     
    Note that:  Using a large prescaler value together with 16 bit mode counting,
    it will be possible to reach about a million count with Timer 0 alone.
    But be aware that doing a software reload of the TMR0H and TMR0L registers in 16 bit mode,
    as is common practice with 16 bit timers to achieve a wanted timer period,
    will clear the prescaler counter, and thus may cause the timer period to drift.
     
    Note that: RD16 bit in Timer 1 (and 3 and 5) have a very different effect than T016BIT in Timer 0.
    T016BIT in PIC18F25Q10, is the same as MD16 bit for Timer 0 in many other PIC devices.
     
    I would normally want to use Timer 1 with the SOSC oscillator at 32.768 kHz,
    and Timer 0 or one if the 8 bit Timers with the MHz clock signal as input.
    If the system clock is higher than 4 MHz, that is Fosc/4 is higher than 1 MHz,
    I would use Prescaler to take the frequency down to 1 MHz,
    use Period register value = 249, for 250 counts, and Postscaler 1/4,
    to get a 1 millisecond period. There are several combinations possible.
    Then count in Software to 1000 milliseconds  for a 1 second period.
    This will give possibilities of cycle correct counting, both for the 32.768 kHz oscillator,
    and from the xMHz system clock frequency.
    And possibilities for cycle correct comparision of frequency or drift between crystal oscillators.
     
    Or you may use it to compare and tune the internal HFINTOSC oscillator.
     
    It will be possible to keep the 32.768 kHz timing active also during sleep mode,
    whether Timer 0 or Timer 1 is used with the SOSC oscillator.
     
    In addition, there will be a 1 millisecond tick signal and a millisecond count available in software,
    without using another timer.
     
    There is a trick possible to avoid loosing ticks when updating the Timer 1 counter registers,
    when using a 32.768 kHz watch crystal oscillator with a 16 bit timer:
    Use the Read/Write 16 bit mode bit:  T1CONbits.RD16 = 0;  
    and update TMR1H register only:  TMR1H = 0x80;    // Do Not touch TMR0L register.
    This will give a 32768 count increment to the Timer value which will otherwise run to 2 seconds if there is no timer update.
    To be successful, this must be done within 8 milliseconds after a Timer 1 rollover have occurred.
    This may be used with Timer 1, Timer 3, or Timer 5. It will not work with Timer 0.
     
    Regards,
        Mysil
     
     
     
    #5
    Jump to:
    © 2020 APG vNext Commercial Version 4.5