24FJ64GA002 I2C not seeing first Start bit and Event Interrupt Flag Status?
Can someone with one of these processors verify something for me, before I report it to MicroChip?
I have been working on some non-IRQ (polled) I2C SLAVE code for several PIC24 processors. My code worked fine on two of them, then I ran into a snag when I started testing on this processor.
It appears that the PIC24 does not set the Start bit (I2C2STAT.3) or the Event Interrupt Flag Status bit (IFS1.0) on the first incoming I2C message from the Master.
I am using the CCS compiler to initialize the I2C interface on a 24FJ64GA002.
#use i2c(SLAVE, FORCE_HW, I2C2, stream=SYSTEM_BUS)
i2c_slaveaddr (SYSTEM_BUS, I2C_SYSTEM_BUS_ADDRESS);
I can initialize the I2C with an address, then just have code block on the S bit:
while (S == 0);
I set a breakpoint on the while(1) line, and then write some I2C bytes to this address. I never hit my breakpoint that *first* write. When I manually break, I see it is still at the "hile (S == 0)" but looking at the registers I see that the P bit has been set, but the Event Interrupt Flag Status bit is not.
I am NOT using an interrupt, so I would have to manually clear the interrupt flag, so it should still be set.
The next I2C message that comes in works as expected.
Thoughts? (I guess I should look up eratta for this chip.)