Definition of "Clamp Current" spec please
I'm planning to use a 16F18855 in my very first PIC project, and have a question involving the I/O pins. I'm assuming that, like most CMOS parts, there's an internal diode from these pins pointing toward Vdd and one pointing to the pin from Vss (ground). Is the spec reference to 'Clamp Current' what one of these pins can safely absorb when a voltage outside the PIC's supply rails is applied from an impedance-limited source? In particular, if one is using a higher voltage logic in other circuitry, and applies it to a PIC input pin through a high value resistor, will this compromise the PIC? In my circuit, I have an op-amp output that can go a +9V rail, and maybe down to -1V under some circumstances. Would a 10k resistor to the PIC pin protect the input? I know that it would work with a 4000-series CMOS part, but using something like a hex inverter to cap voltages at 0 and +5V would be overkill if the PIC does the same thing. Thanks!