• AVR Freaks

Hot!EEPROM on PIC18

Page: 12 > Showing page 1 of 2
Author
crosland
Super Member
  • Total Posts : 1696
  • Reward points : 0
  • Joined: 2005/05/10 10:55:05
  • Location: Warks, UK
  • Status: offline
2019/11/06 05:06:41 (permalink)
0

EEPROM on PIC18

This is a much shortened version of what I wanted to post but keep hitting the "access denied error in this forum". For the full story see post 15 https://www.microchip.com/forums/m1117531.aspx
 
Simple question: Is XC8 (I'm currently using 2.10) guaranteed to generate the correct unlock sequence for EEPROM writes?
 
 
#1

30 Replies Related Threads

    NKurzman
    A Guy on the Net
    • Total Posts : 18039
    • Reward points : 0
    • Joined: 2008/01/16 19:33:48
    • Location: 0
    • Status: offline
    Re: EEPROM on PIC18 2019/11/06 06:31:45 (permalink)
    +1 (1)
    You can check the list file and see if it did.
    Guaranteed is a strong word.
    It one time the bootloader example had ASM for the unlock.
    The pro version usual did. ( your version may vary) the free one did not always.
    post edited by NKurzman - 2019/11/06 06:34:23
    #2
    crosland
    Super Member
    • Total Posts : 1696
    • Reward points : 0
    • Joined: 2005/05/10 10:55:05
    • Location: Warks, UK
    • Status: offline
    Re: EEPROM on PIC18 2019/11/06 07:27:23 (permalink)
    0
    NKurzman
    You can check the list file and see if it did.

    Every time. I am not doing that.

    Guaranteed is a strong word.
    It one time the bootloader example had ASM for the unlock.

    That's what I expected MCC to give me, but it just spews out the regular C code from the data sheet.
     
    It *has* to be guaranteed, one way or another. Or Microchip have to come clean.
    #3
    NKurzman
    A Guy on the Net
    • Total Posts : 18039
    • Reward points : 0
    • Joined: 2008/01/16 19:33:48
    • Location: 0
    • Status: offline
    Re: EEPROM on PIC18 2019/11/06 08:15:04 (permalink)
    +1 (1)
    Sometime you have to check the ASM (like when expecting Atomic Operations)
    I can say XC8 V1.34 did not in Free mode. But, all the Hi-Tech Version did in Promode.
     
    See if Jeff Drops by with an option. 
    #4
    1and0
    Access is Denied
    • Total Posts : 9994
    • Reward points : 0
    • Joined: 2007/05/06 12:03:20
    • Location: Harry's Gray Matter
    • Status: offline
    Re: EEPROM on PIC18 2019/11/06 09:00:50 (permalink)
    +1 (1)
    crosland
    It *has* to be guaranteed, one way or another. Or Microchip have to come clean.

    The only surefire way to guarantee the correct magic sequence is to use assembly.
     
    #5
    crosland
    Super Member
    • Total Posts : 1696
    • Reward points : 0
    • Joined: 2005/05/10 10:55:05
    • Location: Warks, UK
    • Status: offline
    Re: EEPROM on PIC18 2019/11/06 09:59:05 (permalink)
    0
    So I was wrong, the datasheet gives assembly code. Why doesn't MCC generate that, for certainty?
     
    What has also become apparent is that the NVMCON registers are in the access bank and there should never be any need for superfluous bank changing code.
     
    Maybe the C code is OK after all.
    #6
    1and0
    Access is Denied
    • Total Posts : 9994
    • Reward points : 0
    • Joined: 2007/05/06 12:03:20
    • Location: Harry's Gray Matter
    • Status: offline
    Re: EEPROM on PIC18 2019/11/06 10:31:17 (permalink)
    0
    crosland
    So I was wrong, the datasheet gives assembly code. Why doesn't MCC generate that, for certainty?

    MCC generates C source code and it is up to the compiler to generate the hex code. How smart is the compiler depends on the compiler writers. ;)
     

    What has also become apparent is that the NVMCON registers are in the access bank and there should never be any need for superfluous bank changing code.
     
    Maybe the C code is OK after all.

    If the NVMCON registers are located in the Access Bank then the chance is good it will generate the correct magic sequence. However, there are PIC18 devices where these registers are NOT located in the Access Bank.
     
    For PIC16 devices, it is a Russian roulette. ;)
    #7
    NKurzman
    A Guy on the Net
    • Total Posts : 18039
    • Reward points : 0
    • Joined: 2008/01/16 19:33:48
    • Location: 0
    • Status: offline
    Re: EEPROM on PIC18 2019/11/06 10:45:39 (permalink)
    +1 (1)
    "Why doesn't MCC generate that, for certainty?" 
    Only the Programmer knows why they did that.
    #8
    1and0
    Access is Denied
    • Total Posts : 9994
    • Reward points : 0
    • Joined: 2007/05/06 12:03:20
    • Location: Harry's Gray Matter
    • Status: offline
    Re: EEPROM on PIC18 2019/11/06 10:52:06 (permalink)
    0
    NKurzman
    "Why doesn't MCC generate that, for certainty?" 
    Only the Programmer knows why they did that.

    MCC could generate the correct assembly code, but as said, only the MCC programmers know why they don't. ;)
     
    #9
    crosland
    Super Member
    • Total Posts : 1696
    • Reward points : 0
    • Joined: 2005/05/10 10:55:05
    • Location: Warks, UK
    • Status: offline
    Re: EEPROM on PIC18 2019/11/06 11:26:03 (permalink)
    0
    1and0
    For PIC16 devices, it is a Russian roulette. ;)



    For PIC16 I would use __eeprom qualified variables, or the EEPROM access functions/macros, and assume/hope/pray[1] that the compiler does the right thing :)
     
    [1] delete as appropriate
    #10
    JPortici
    Super Member
    • Total Posts : 849
    • Reward points : 0
    • Joined: 2012/11/17 06:27:45
    • Location: Grappaland
    • Status: offline
    Re: EEPROM on PIC18 2019/11/06 12:17:56 (permalink)
    0
    NKurzman
    Sometime you have to check the ASM (like when expecting Atomic Operations)
    I can say XC8 V1.34 did not in Free mode. But, all the Hi-Tech Version did in Promode.
     
    See if Jeff Drops by with an option. 




    wasn't 1.34 one of the botched versions, that received nearly immediate updates?
    I've been using XC8 since at least 1.20-something and i have ner had to use assembly for the unlock sequences. Free mode, of course
    #11
    NKurzman
    A Guy on the Net
    • Total Posts : 18039
    • Reward points : 0
    • Joined: 2008/01/16 19:33:48
    • Location: 0
    • Status: offline
    Re: EEPROM on PIC18 2019/11/06 12:29:25 (permalink)
    0
    Jack_M
     

    wasn't 1.34 one of the botched versions, that received nearly immediate updates?
    I've been using XC8 since at least 1.20-something and i have ner had to use assembly for the unlock sequences. Free mode, of course



    I just looked at the Last PIC16 Bootloader I did.  I think about that time none of them did the Lock sequence correct in Free Mode.  I can't speak for V2.XX
    #12
    1and0
    Access is Denied
    • Total Posts : 9994
    • Reward points : 0
    • Joined: 2007/05/06 12:03:20
    • Location: Harry's Gray Matter
    • Status: offline
    Re: EEPROM on PIC18 2019/11/06 12:34:08 (permalink)
    0
    Here's a blotched magic sequence (Post #29) generated with v2.05: https://www.microchip.com/forums/FindPost/1108388
    #13
    jtemples
    عُضْوٌ جَدِيد
    • Total Posts : 11426
    • Reward points : 0
    • Joined: 2004/02/13 12:31:19
    • Location: Southern California
    • Status: offline
    Re: EEPROM on PIC18 2019/11/06 12:41:34 (permalink)
    +2 (2)
    1and0
    Here's a blotched magic sequence (Post #29) generated with v2.05: https://www.microchip.com/forums/FindPost/1108388

     
    But wasn't that caused by enabling the "local code" option which is not supposed to be enabled?
     
    I'm in my third decade of writing PIC code and I've never written an assembly language unlock sequence.
    #14
    1and0
    Access is Denied
    • Total Posts : 9994
    • Reward points : 0
    • Joined: 2007/05/06 12:03:20
    • Location: Harry's Gray Matter
    • Status: offline
    Re: EEPROM on PIC18 2019/11/06 12:45:07 (permalink)
    0
    jtemples
    But wasn't that caused by enabling the "local code" option which is not supposed to be enabled?
    I'm in my third decade of writing PIC code and I've never written an assembly language unlock sequence.

    Looking closely, it was.


    Here's another one (Post #6): https://www.microchip.com/forums/FindPost/999298
    #15
    mbrowning
    USNA79
    • Total Posts : 1564
    • Reward points : 0
    • Joined: 2005/03/16 14:32:56
    • Location: Melbourne, FL
    • Status: offline
    Re: EEPROM on PIC18 2019/11/06 12:59:32 (permalink)
    0
    jtemples
    I'm in my third decade of writing PIC code and I've never written an assembly language unlock sequence

    MCC bootloader generator generates this:
    NVMCON2 = EE_Key_1;
    NVMCON2 = EE_Key_2;
    NVMCON1bits.WR =1;

    where EE_Key_x are in access bank and loaded with 0x55/0xaa from a message (to prevent a bad message from corrupting flash).
    I had to convert this to inline assembly because of bank instructions. This was a couple years ago with an older XC8 version.

    Go Navy! Beat Army!
    #16
    jtemples
    عُضْوٌ جَدِيد
    • Total Posts : 11426
    • Reward points : 0
    • Joined: 2004/02/13 12:31:19
    • Location: Southern California
    • Status: offline
    Re: EEPROM on PIC18 2019/11/06 13:06:44 (permalink)
    +1 (1)
    Here's another one

     
    That one's free mode which I've never used.  Does the current XC8 which allows some optimizations in free mode get it right?
    #17
    jtemples
    عُضْوٌ جَدِيد
    • Total Posts : 11426
    • Reward points : 0
    • Joined: 2004/02/13 12:31:19
    • Location: Southern California
    • Status: offline
    Re: EEPROM on PIC18 2019/11/06 13:10:07 (permalink)
    +1 (1)
     
    EE_Key_x are in access bank and loaded with 0x55/0xaa from a message (to prevent a bad message from corrupting flash).

     
    They pass 55/AA in every "write" message?
    #18
    crosland
    Super Member
    • Total Posts : 1696
    • Reward points : 0
    • Joined: 2005/05/10 10:55:05
    • Location: Warks, UK
    • Status: offline
    Re: EEPROM on PIC18 2019/11/06 13:22:56 (permalink)
    +1 (1)
    jtemples
    Here's another one

     
    That one's free mode which I've never used.  Does the current XC8 which allows some optimizations in free mode get it right?


    For my PIC (25K40 with NVMCON in access bank) and free XC8 2.10 with level 2, it gets it right.
     
    Another compiler version, another chip, ... who knows?
    #19
    mad_c
    Super Member
    • Total Posts : 1206
    • Reward points : 0
    • Joined: 2010/12/12 17:48:27
    • Location: Brisbane, Australia
    • Status: offline
    Re: EEPROM on PIC18 2019/11/06 13:50:54 (permalink)
    +4 (4)
    crosland
    Simple question: Is XC8 (I'm currently using 2.10) guaranteed to generate the correct unlock sequence for EEPROM writes?


    Hi,
     
    A list of registers that might be associated with unlock sequences is stored with the compiler. Any access to these registers must be done without extraneous bank selection instructions appearing in the sequence. You can see the addresses of these registers in the INI for the device you are using, in <dist>/pic/dat/ini/18f26k42.ini, for example. Look for VOLSFRS.
     
    If the compiler is not producing the correct sequence for an SFR on this list, this is a compiler bug. If a register used in an unlock sequence is not on the list, then it needs to be added. In both cases, contact Support with the relevant information.
     
    Jeff.
    post edited by mad_c - 2019/11/06 15:02:47
    #20
    Page: 12 > Showing page 1 of 2
    Jump to:
    © 2019 APG vNext Commercial Version 4.5