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AnsweredHot!12f675 clock problem

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ubuntuman
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2019/10/17 17:15:08 (permalink)
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12f675 clock problem

sbit triac at GP2_bit;

double voltage=2.5;
unsigned short int done=0;
unsigned short int persistenceOn=0;
unsigned short int persistenceOff=0;
unsigned short int triacFlag=0;
unsigned int lightLevel1=0;
unsigned int lightLevel2=0;
unsigned int lightLevel=0;
unsigned int ADCnumber=500; // 511 to be corresponding to about 2 voltage
unsigned short int oneSecondCounter=0;
unsigned short int Seconds=0;
volatile unsigned int flag=0;

void interrupt()
{
  if (INTCON.T0IF==1)
  {
   oneSecondCounter++;
   if(oneSecondCounter>=16){Seconds++;oneSecondCounter=0;}
   if(Seconds>=2){flag=1;Seconds=0;}
   INTCON.T0IF = 0;
  }
}

void main()
{
//******************************************************************************************
  cmcon=7;
//*************************** IN/Out registers ***************************************************************
  TRISIO2_bit=0;
  TRISIO4_bit=1;
  TRISIO3_bit=1;
  TRISIO0_bit=1;
  TRISIO1_bit=0;
  TRISIO5_bit=0;
//****************************** Analog registers ************************************************************
  ANSEL.ANS0=1;
  ANSEL.ANS1=0;
  ANSEL.ANS2=0;
  ANSEL.ANS3=0;

  ADCON0.CHS1=0;
  ADCON0.CHS0=0;

  ANSEL.ADCS0=0;
  ANSEL.ADCS1=1;
  ANSEL.ADCS2=1;

  ADCON0.ADFM=0;
  ADCON0.ADON=1;
  ADCON0.B1=0;
  ADCON0.VCFG=0;
//******************************* Timer0 register ***********************************************************
  TMR0=0;
  OPTION_REG.T0CS=0;
  OPTION_REG.PSA=0;

  OPTION_REG.PS0=1;
  OPTION_REG.PS1=1;
  OPTION_REG.PS2=1;

  INTCON.GIE=1;
  INTCON.T0IE=1;
  INTCON.PEIE=1;
//********************************** Setting initial in/out pins ********************************************************
  triac=0;
  GP1_bit=0;
  GP5_bit=0;
//******************************************************************************************
  while(1)
  {
    if(GP4_bit==1)
    {
      if(done==0)
      {
        if(voltage!=5)voltage+=0.5;
        else voltage*=0;
        done=1;
        ADCnumber=voltage*1023;
        ADCnumber/=5;
      }
    }
    else done=0;
    
    if(flag==1)
    {
      ADCON0.B1=1;
      while(ADCON0.B1==1){}
      lightLevel1=ADRESH;
      lightLevel2=ADRESL;
      lightLevel2=lightLevel2>>6;
      lightLevel1=lightLevel1<<2;
      lightLevel=lightLevel1|lightLevel2;
      if(triacFlag==0)
      {
       if(lightLevel>=ADCnumber)persistenceOn++;
       else persistenceOn=0;
      }
      else if(triacFlag==1)
      {
       if(lightLevel<ADCnumber)persistenceOff++;
       else persistenceOff=0;
      }
      flag=0;
    }

   if(persistenceOn>=10)
   {
     triac=1;
     lightLevel1*=0;
     lightLevel2*=0;
     lightLevel*=0;
     persistenceOn=0;
     triacFlag=1;
   }
   if(persistenceOff>10)
   {
     triac=0;
     lightLevel1*=0;
     lightLevel2*=0;
     lightLevel*=0;
     persistenceOff=0;
     triacFlag=0;
   }
 }
}

 
Here you are the full code of mine i select clock to be internal for 2Mhz and timer0 i select to have a prescale with 1/256
so its clock should be 2000000/256 and it should overflow after 256 counts so to count one second i should count 2000000/256/256 =about 30 overflow per second so to get one second i should count 30 overflow 
but here i count 16 overfload and i didnt get the time even right those 16 overflow equals to about 27 sec 
so is there anything wrong ?
i use mikroc for pic to write to code 
#1
Ian.M
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Re: 12f675 clock problem 2019/10/17 17:31:08 (permalink) ☄ Helpfulby ubuntuman 2019/10/22 18:54:36
+1 (1)
ubuntuman... i select clock to be internal for 2Mhz ...


No you didn't.  A PIC12F675 only has a single frequency INTOSC that runs at a nominal 4 MHz which gives Fosc/4 to the peripheral modules of 1 MHz, including to the Timer 0 prescaler.    
 
16 overflows per second would be right in the ballpark* for /256 prescaler fed with 1MHz. 
 
If you've got a frequency counter or DSO, you can set the CONFIG for INTOSC oscillator: CLKOUT function on GP4/OSC2/CLKOUT pin, and directly measure the Fosc/4 frequency.
 
* i.e. consistent with the specified oscillator frequency tolerance (datasheet parameter F10).  N.B. If you have problems reprogramming a PIC12F675 device, its probable you'll accidentally wipe the RETLW at the top of the Flash memory that stores the  factory oscillator calibration value, resulting in an oscillator frequency error of up to or even over 40%.   
post edited by Ian.M - 2019/10/17 17:43:46

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#2
ric
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Re: 12f675 clock problem 2019/10/17 17:31:26 (permalink) ☼ Best Answerby ubuntuman 2019/10/22 18:55:36
+1 (1)
ubuntuman
... i select clock to be internal for 2Mhz

How?
Your internal oscillator is 4MHz. You can  only trim that up and down slightly with the OSCCAL register.
You cannot select 2MHz.
 

and timer0 i select to have a prescale with 1/256
so its clock should be 2000000/256

No. The timer (and the prescaler) is clocked from Fosc/4.
Assuming you are using the internal 4MHz oscillator, then this will be 1MHz, so after pre-scaling you have 3,906.25 Hz
 

and it should overflow after 256 counts so to count one second i should count 2000000/256/256 =about 30 overflow per second so to get one second i should count 30 overflow
but here i count 16 overfload and i didnt get the time even right those 16 overflow equals to about 27 sec 
so is there anything wrong ?

No, you're still out by a factor of two. The actual required count is 15.2588
 

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#3
Ian.M
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Re: 12f675 clock problem 2019/10/17 17:32:55 (permalink)
+3 (3)
@Ric: *JUST* beat you to it! <LOL>

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#4
ric
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Re: 12f675 clock problem 2019/10/17 17:33:57 (permalink)
+3 (3)
Someone interrupted me while I was in the middle of typing ;)
 

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#5
ubuntuman
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Re: 12f675 clock problem 2019/10/17 17:57:50 (permalink)
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but why it is written in the data sheet that the ADC clock can be prescaled directly from FOSC if all prephirals is clocked by FOSC/4??
#6
ric
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Re: 12f675 clock problem 2019/10/17 18:03:57 (permalink)
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Yes, the ADC says one possible input clock is Fosc/2, so that must be possible.
If you read the Timer0 chapter, it clearly shows the input clock is Fosc/4
 

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Ian.M
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Re: 12f675 clock problem 2019/10/17 18:11:29 (permalink)
+2 (2)
Sorry, I should have said all DIGITAL peripherals.   Fosc/2 seems to be a fairly common option for standard Midrange PICs' max. ADC module conversion clock, but it certainly won't be available to the rest of the device for timers etc.  On PICs with a CCP module, I believe the timer 2 prescaler runs off Fosc with an undocumented extra two bits (extra /4 between it and the timer) which gives a timer 2 increment rate identical to that which the documentation shows with a Fosc/4 input to the prescaler, but allows the hardware for PWM mode to 'snoop' the prescaler to compare the two LSBs of the 10 bit duty cycle, without having to include multiplexing logic to select the source of those LSB bits. 
 
The situation with Enhanced Midrange PICs and newer PIC18 is a bit different as, depending on the device, *SOME* of their timers may be clockable at the full Fosc. 
post edited by Ian.M - 2019/10/17 18:19:25

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