PIC18F24K42 MOVFF instruction.
I've been debugging assembler code for the 18F24K42 processor, and it would appear that the MOVFF instruction fails even though the source and destination registers are in the SFR area (specifically PRODH and PRODL and access RAM).
Debugging was done using MPLAB X Rev 5.20 with no interrupts executing.
Replacing the instruction "movff SFR,REG" with "movf SFR,w "followed by "movwf REG" operates as expected, all the registers concerned being in access RAM. Setting the BSR has no effect on the symptoms.
I haven't explored other SFR's other than some of the FSR's, and they too all appear to have the same problem. Maybe its a problem with SFR's that have shadow registers associated with them - again not explored that possibility.