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Hot!MCLR capacitor (RC) required for PIC24FJ64GA705 ?

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cea
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Re: MCLR capacitor (RC) required for PIC24FJ64GA705 ? 2020/10/02 15:24:28 (permalink)
5 (1)
This is what the errata (DS80000718F) states:
 
20. Module: Oscillator
The PLL in 96 MHz mode may not function when the device starts up and the capacitor on the VCAP pin is discharged. This condition is applicable in both Two-Speed Oscillator Start-up and clock switching at run time.
 
Work around
  1. The 8x/6x/4x PLL modes are functional and available for use.
  2. If 96 MHz PLL mode is required for application, connect a 1 µF capacitor between VDD and VCAP to precharge the VCAP capacitor.
Affected Silicon Revisions
A3   A4
[x]   [x]
 
Has Microchip said that a capacitor from VDD to VCAP is a robust fix for your problem?
 
It you be great to understand how this works after a watchdog timeout wakes the controller from sleep or Deep sleep where the VDD voltage does not change.
ric
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Re: MCLR capacitor (RC) required for PIC24FJ64GA705 ? 2020/10/02 16:31:01 (permalink)
3 (2)
charles@socketcom
....
It you be great to understand how this works after a watchdog timeout wakes the controller from sleep or Deep sleep where the VDD voltage does not change.

Does Vcap discharge back to zero in those conditions?

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user2x
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Re: MCLR capacitor (RC) required for PIC24FJ64GA705 ? 2020/10/05 15:21:05 (permalink)
5 (1)
 
The support did conform that they believe the problem in the divider is also caused by the Vcap charge issue.
An updated errata (coming when??) will reflect this.
 
The workaround when using the divider will be to pre-charge the Vcap by adding a Vdd capacitor as per the A20 errata.
 
That is what I was told by the support.
 
Am I sure about that? No.
 
During some of my testing, I discharged the Vcap fully, with  with tweezers before powering up.
It is unclear whether that made much difference.
 
 
What I found most interesting is that the chip seemed to latch the non working condition, once present.
 
I can say however that one chip came back alive after I fitted the 1uF cap to Vdd.
 
That is where I left it as I have since stopped using the divider and I have too much other stuff to do on this project.
 
 
 
 
 
 
cea
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Re: MCLR capacitor (RC) required for PIC24FJ64GA705 ? 2020/10/05 15:56:34 (permalink)
3.5 (2)
user2x
That is where I left it as I have since stopped using the divider and I have too much other stuff to do on this project.

The Microchip implementation of a fractional divider has not had a good history in other families.
 
In my view you have made a good choice to not use it at all.
cea
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Re: MCLR capacitor (RC) required for PIC24FJ64GA705 ? 2020/10/08 21:00:12 (permalink)
4 (1)
ric
cea
....
It you be great to understand how this works after a watchdog timeout wakes the controller from sleep or Deep sleep where the VDD voltage does not change.

Does Vcap discharge back to zero in those conditions?

I have check for this and the VCAP voltage does not drop when the PIC24FJ256GA702 is in sleep mode.
 
The PIC24FJ256GA702 does not have a deep sleep mode so this is not a concern, sorry I raised it.
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