[ADC] What is the point of TAD configuration?
I'm bashing my head against ADC configuration on PIC24.
My requirements are the simplest one can possibly imagine: I need to sample one ADC channel at least once every 100 milliseconds (laughably slow). No need for DMA, interrupts or even auto sampling since I'm already struggling with full manual operation.
After several attempts I actually have a working configuration to poll the ADC channel. Still, I would like to fully understand the options I'm using.
Specifically I can't seem to wrap my head around the `ADxCON3.ADCS` register.
The datasheets defines it as:
A/D Conversion Clock Select bits
Which is pretty ambiguous. After digging for a while I understood that it decides the value of TAD, as in TAD = (`ADxCON3.ADCS`+1) * TCY. TCY is 1/FOSC. FOSC = the oscillator frequency / 2.
What exactly is TAD? I only know that a conversion sequence (from when SAMP is cleared to when the conversion is complete) takes 14*TAD time, and that the sampling period (from when SAMP is set to when it is cleared) must be at least 3*TAD - written only in fine print at the end of the FRM.
That being said, what is the use in having a longer conversion sequence? Does the precision improve?