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Hot!External clock sync

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pcbbc
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Re: External clock sync 2019/10/11 06:56:41 (permalink)
+1 (1)
You need to return something from this function if you want it to do anything useful...
int calcEvenParityBit(unsigned par, unsigned width) {
while (width > 1) {
par ^= par >> (width/2);
width -= width/2;
}
}

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xfiles_2007
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Re: External clock sync 2019/10/11 07:07:01 (permalink)
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I disable it as RX and TX are connected on the same line.
 
 
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xfiles_2007
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Re: External clock sync 2019/10/11 07:09:39 (permalink)
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pcbbc
You need to return something from this function if you want it to do anything useful...
int calcEvenParityBit(unsigned par, unsigned width) {
while (width > 1) {
par ^= par >> (width/2);
width -= width/2;
}
}





Thanks. The correct parity works in the code so all good there I think but yep should be returning.
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xfiles_2007
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Re: External clock sync 2019/10/11 07:39:15 (permalink)
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pcbbc
Read the received byte from the transmitting end.  If its 0xFF, do something?


hmm yea but do I put a waiter on it or so ? how to check if its straight after the transmit .


 
At the moment I read the echo byte .
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pcbbc
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Re: External clock sync 2019/10/11 07:43:25 (permalink)
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xfiles_2007hmm yea but do I put a waiter on it or so ? how to check if its straight after the transmit.

Yes, wait for a timeout.  However long you think it will take to transmit to the host and be received, plus processing time at the host to return a result, plus a small extra delay to account for an variance.


After that you you have to assume the host hasn't received it (although it may have, and you just haven't received the reply).
#25
Jerry Messina
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Re: External clock sync 2019/10/11 09:30:30 (permalink)
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I disable it as RX and TX are connected on the same line

Physically the same line? Are there any drivers involved?
 
When you disable the transmitter then the TX pin is now controlled via the PORT pin setting, which is set as an input so the RX pin floats and you get garbage. If there's no other hardware involved then add a pullup to the TX-RX connection. The idle state for a uart TX pin is a high.
#26
ric
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Re: External clock sync 2019/10/11 14:45:59 (permalink)
+1 (1)
So why disable it at all?
As Jerry noted, that will CREATE problems, not solve them.

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xfiles_2007
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Re: External clock sync 2019/10/11 20:50:54 (permalink)
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thanks ill try a pull-up and see what happens
 
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xfiles_2007
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Re: External clock sync 2019/10/15 04:48:21 (permalink)
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with the rx on the same line as the tx - do I need to disable the tx port when im reading to receive , or will a pull up resistor determine this ?
 
Looks like when I stop doing the whole enable/disable TX the noise is gone. Thanks
 
 
#29
ric
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Re: External clock sync 2019/10/15 04:51:56 (permalink)
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xfiles_2007
with the rx on the same line as the tx - do I need to disable the tx port when im reading to receive , or will a pull up resistor determine this ?

Are you trying to use a single wire for both RX and TX (i.e. "half duplex" communication) ?
You had not mentioned this before.
What is at the other end of this wire?
 
 

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pcbbc
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Re: External clock sync 2019/10/15 04:53:06 (permalink)
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xfiles_2007
with the rx on the same line as the tx - do I need to disable the tx port when im reading to receive , or will a pull up resistor determine this ? Looks like when I stop doing the whole enable/disable TX the noise is gone. Thanks  

No.
Transmit and receive can happen at the same time. So no need to disable, and therefore no need for a pull up if you leave tx enabled. With tx enabled the UART has control of the pin and will automatically pull high when nothing to transmit.
I’ve no idea why you thought you needed to disable tx in the first place.
#31
pcbbc
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Re: External clock sync 2019/10/15 04:55:38 (permalink)
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ric
xfiles_2007with the rx on the same line as the tx - do I need to disable the tx port when im reading to receive , or will a pull up resistor determine this ?

Are you trying to use a single wire for both RX and TX (i.e. "half duplex" communication) ?You had not mentioned this before.What is at the other end of this wire?  

My reading of the OPs previous posts was that he has connected Tx to his own Rx. So effectively a loopback.
I could be wrong.
#32
ric
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Re: External clock sync 2019/10/15 05:24:34 (permalink)
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Better of he clarifies rather than leaving us guessing what he has done, and why.

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xfiles_2007
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Re: External clock sync 2019/10/15 05:24:35 (permalink)
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hi sorry yes its half duplex - tx and rx are on the same line 
#34
ric
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Re: External clock sync 2019/10/15 05:25:42 (permalink)
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xfiles_2007
hi sorry yes its half duplex - tx and rx are on the same line 

You could have mentioned that earlier!
So, what are you communicating with?
How do you ensure that you don't both try to drive this single line at the same time?
 

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pcbbc
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Re: External clock sync 2019/10/15 05:39:14 (permalink)
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I would suggest drawing a diagram of the devices at both ends, and which Tx and Rx pins you have connected on each.
#36
xfiles_2007
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Re: External clock sync 2019/10/15 06:29:28 (permalink)
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at the moment im controlling it via software and counts of bytes - basically based on when I expect incoming data then disable tx, enable rx, vice versa. im communicating with a smart card reader and sending packets of data and getting responses. 
 
ill try to draw it later on but basically:
- rx/tx of reader to rx/tx UART1 (rc6,7) of the Microchip
- gnd of reader to vss of chip
- reset of reader to mclr of chip
- clk of reader to RA7
- vcc to vdd 
#37
NorthGuy
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Re: External clock sync 2019/10/15 06:49:43 (permalink)
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xfiles_2007
- rx/tx of reader to rx/tx UART1 (rc6,7) of the Microchip

 
Looks like 2 wires. Do you connect TX to RX and RX to TX?
 
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xfiles_2007
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Re: External clock sync 2019/10/15 06:59:43 (permalink)
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one wire Sorry.
So that’s

One wire from I/O of the reader to the rx1 and tx1
#39
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Re: External clock sync 2019/10/15 07:20:11 (permalink)
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xfiles_2007
One wire from I/O of the reader to the rx1 and tx1

I have not read the entire threads, but it looks like you've asked about this almost three years ago: https://www.microchip.com/forums/m954251.aspx
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