It is rather bad situation! I just checked for POR re-arm voltage threshold, DC16 VPOR
parameter of TABLE 32-3: DC CHARACTERISTICS: TEMPERATURE AND VOLTAGE SPECIFICATIONS of the datasheet. And know what? It is VSS
minimum! We are lucky they aren't ask us to apply negative voltage to VDD
pin to guarantee power-on reset!
Usually, irrespective of voltage regulators, you had to lower the VDD
deeper than VPOR
to ensure the PIC will startup correctly at next supply voltage rise. But VPOR
is a nonsense! Very bad. This parameter requires you to short supply voltage to the ground before voltage re-apply.
Minimum voltage the chip can keep a good state is 1.9V while sleeping and 2V while running (DC10, DC12). If you have got down below that, you should
to ground and only after to apply a voltage again.
Have you red an Errata? #13:
Module: Power-on Reset When the device is operating with Brown-out Reset (BOR) disabled, it is recommended to follow the data sheet specification of starting the VDD from VSS to ensure an internal Power-on Reset. Failing to do so may result in the device failing to start up or other unexpected behavior. Work around There are three work arounds to resolve the issue: 1. Enable the BOR to ensure that the device gets a proper Power-on Reset. 2. If the BOR cannot be enabled, always start the VDD from VSS to ensure a proper Poweron Reset (Parameter No. DC16 in Table 32-3 of Section 32.0 “Electrical Characteristics” in the data sheet). 3. Use an external voltage supervisor chip on the MCLR pin to hold the MCLR low when the power supply voltage is between 1.4V and 2.0V. Release MCLR after the VDD is in the operating range.
Have you tested #1 and #3 workarounds? Also #11 errata may be relevant.
As for hardware workaround I'd try to decouple the Vdd from bouncing battery contacts by a diode. And, may be, place some more capacitance at VDD
to ground. Probably, a diode in conjunction with larger capacitor will provide single voltage rise at VDD
without of several rather sharp deeps as on your scope diagram.