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PIC24FJ128GB202 - using SCLKI for digital input.

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2019/09/13 13:24:18 (permalink)

PIC24FJ128GB202 - using SCLKI for digital input.

I need to use the SCLKI pin (RA4) as a digital input, but it's not working.
This pin can also function as the input for the secondary oscillator, so to make it an IO pin I have
   #pragma config SOSCSEL = OFF // SOSC Selection bits (Digital (SCLKI) mode)
The project uses no analog functions so I have
    ANSA = 0; //port A is all digital, no analog
The pin is input only.  There is no TRIS bit for it.  You can try to set the TRIS bit, but it will read 0 when you check it.
When I read the pin using
      read_a = PORTA;
the bit for the pin always reads as 0.
I am probably overlooking something simple.  Can anybody see what I have overlooked?

3 Replies Related Threads

    Howard Long
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    Re: PIC24FJ128GB202 - using SCLKI for digital input. 2019/09/13 14:44:34 (permalink)
    I can't deny, this intrigued me. However I don't seem to be able to recreate your problem.
    Edit: This was done on real silicon a Microstick II board. Note that there is a TRISA4 bit defined in the header files, although it's not in the datasheet.


    // PIC24FJ128GB202 Configuration Bit Settings
    // 'C' source line config statements
    // CONFIG4
    #pragma config DSWDTPS = DSWDTPS1F // Deep Sleep Watchdog Timer Postscale Select bits (1:68719476736 (25.7 Days))
    #pragma config DSWDTOSC = LPRC // DSWDT Reference Clock Select (DSWDT uses LPRC as reference clock)
    #pragma config DSBOREN = OFF // Deep Sleep BOR Enable bit (DSBOR Disabled)
    #pragma config DSWDTEN = OFF // Deep Sleep Watchdog Timer Enable (DSWDT Disabled)
    #pragma config DSSWEN = OFF // DSEN Bit Enable (Deep Sleep operation is always disabled)
    #pragma config PLLDIV = DISABLED // USB 96 MHz PLL Prescaler Select bits (PLL Disabled)
    #pragma config I2C1SEL = DISABLE // Alternate I2C1 enable bit (I2C1 uses SCL1 and SDA1 pins)
    #pragma config IOL1WAY = OFF // PPS IOLOCK Set Only Once Enable bit (The IOLOCK bit can be set and cleared using the unlock sequence)
    // CONFIG3
    #pragma config WPFP = WPFP127 // Write Protection Flash Page Segment Boundary (Page 127 (0x1FC00))
    #pragma config SOSCSEL = OFF // SOSC Selection bits (Digital (SCLKI) mode)
    #pragma config WDTWIN = PS25_0 // Window Mode Watchdog Timer Window Width Select (Watch Dog Timer Window Width is 25 percent)
    #pragma config PLLSS = PLL_FRC // PLL Secondary Selection Configuration bit (PLL is fed by the on-chip Fast RC (FRC) oscillator)
    #pragma config BOREN = OFF // Brown-out Reset Enable (Brown-out Reset Disabled)
    #pragma config WPDIS = WPDIS // Segment Write Protection Disable (Disabled)
    #pragma config WPCFG = WPCFGDIS // Write Protect Configuration Page Select (Disabled)
    #pragma config WPEND = WPENDMEM // Segment Write Protection End Page Select (Write Protect from WPFP to the last page of memory)
    // CONFIG2
    #pragma config POSCMD = NONE // Primary Oscillator Select (Primary Oscillator Disabled)
    #pragma config WDTCLK = LPRC // WDT Clock Source Select bits (WDT uses LPRC)
    #pragma config OSCIOFCN = OFF // OSCO Pin Configuration (OSCO/CLKO/RA3 functions as CLKO (FOSC/2))
    #pragma config FCKSM = CSECMD // Clock Switching and Fail-Safe Clock Monitor Configuration bits (Clock switching is enabled, Fail-Safe Clock Monitor is disabled)
    #pragma config FNOSC = FRC // Initial Oscillator Select (Fast RC Oscillator (FRC))
    #pragma config ALTRB6 = APPEND // Alternate RB6 pin function enable bit (Append the RP6/ASCL1/PMPD6 functions of RB6 to RA1 pin functions)
    #pragma config ALTCMPI = CxINC_RB // Alternate Comparator Input bit (C1INC is on RB13, C2INC is on RB9 and C3INC is on RA0)
    #pragma config WDTCMX = WDTCLK // WDT Clock Source Select bits (WDT clock source is determined by the WDTCLK Configuration bits)
    #pragma config IESO = OFF // Internal External Switchover (Disabled)
    // CONFIG1
    #pragma config WDTPS = PS32768 // Watchdog Timer Postscaler Select (1:32,768)
    #pragma config FWPSA = PR128 // WDT Prescaler Ratio Select (1:128)
    #pragma config WINDIS = OFF // Windowed WDT Disable (Standard Watchdog Timer)
    #pragma config FWDTEN = OFF // Watchdog Timer Enable (WDT disabled in hardware; SWDTEN bit disabled)
    #pragma config ICS = PGx1 // Emulator Pin Placement Select bits (Emulator functions are shared with PGEC1/PGED1)
    #pragma config LPCFG = OFF // Low power regulator control (Disabled - regardless of RETEN)
    #pragma config GWRP = OFF // General Segment Write Protect (Write to program memory allowed)
    #pragma config GCP = OFF // General Segment Code Protect (Code protection is disabled)
    #pragma config JTAGEN = OFF // JTAG Port Enable (Disabled)
    // #pragma config statements should precede project file includes.
    // Use project enums instead of #define for ON and OFF.
    #include <xc.h>

    int main(void)
    while (1)
    return 0;

    post edited by Howard Long - 2019/09/13 14:51:26
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    Re: PIC24FJ128GB202 - using SCLKI for digital input. 2019/09/13 15:00:35 (permalink)
    Make sure nothing else automatically enables the SOSC, such as a Timer or WDT setting.

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    Re: PIC24FJ128GB202 - using SCLKI for digital input. 2019/09/16 12:34:57 (permalink)
    Problem solved, but I don't know how!
    Inspired by Howard Long's answer, I started a new project and put in the minimum code to do a test.  It worked.  So, I added back chunks of code and tested as I added.  When all the code was added back it still worked!
    So, I started another new projected, added copies of the original projects files, and it worked!
    I am using MPLabX and XC16 v. 1.34 compiler.
    I don't know why it works, but at this point I will use it and move on.
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