Confusing DMA-CRC Results

uint32 Time0;
uint32 Timef;
uint32 Timet;
volatile float TimeS;
char __attribute__((coherent))Test_str[64] = {"FIRMWARE_VERSION"};
char __attribute__((coherent))dump_str[64];
void CRC_Test() //CRC-16/AUG-CCITT (https://crccalc.com/)
{
 uint32 nBytes, i;
 volatile uint32 result;
 
 nBytes = strlen(Test_str);
 memset(dump_str, 0xFF, sizeof(dump_str));
   
 IFS4CLR = 0x0003; // Make sure not interrupt flags are set.
 DMACONbits.ON = 1; // Turn on the DMA system
 
 // *******************
 // *** 16-bit CRCs ***
 // *******************
// DCRCCON=0x00000F81; // CRC enabled, polynomial length 16, append
// for(i=0; i<2; ++i){ // Append 2 0x00s for XorOut
// Test_str[nBytes++] = 0x00;
// }
  
// // CRC-16/XMODEM (works. Tested against https://crccalc.com/)
// DCRCXOR=0x1021; // Use the standard CCITT CRC 16 polynomial: X^16+X^12+X^5+1
// DCRCDATA=0x0000; // seed the CRC generator

 // CRC-16/CCITT-FALSE (Does not work; results are good for CRC-16/AUG-CCITT)
// DCRCXOR=0x1021; // Use the standard CCITT CRC 16 polynomial: X^16+X^12+X^5+1
// DCRCDATA=0xFFFF; // seed the CRC generator
 
 // CRC-16/AUG-CCITT (Does not work)
// DCRCXOR=0x1021; // Use the standard CCITT CRC 16 polynomial: X^16+X^12+X^5+1
// DCRCDATA=0x1D0F; // seed the CRC generator

 
 // *******************
 // *** 32-bit CRCs ***
 // *******************
 DCRCCON=0x00001F81; // CRC enabled, polynomial length 32, append
 for(i=0; i<4; ++i){ // Append 4 0xFFs for XorOut
  Test_str[nBytes++] = 0xFF;
 }
 
 // CRC-32/BZIP2 (Does not work)
 DCRCDATA=0xffffffff; // seed the CRC generator
 DCRCXOR=0x04C11DB7; // CRC 32 polynomial: ...

 
 
 DCH1CON = 0x00000000; // Set DMA priority to min.
 DCH1ECON = 0; // No interrupt trigger.
 DCH1INT = 0x00000000; // Not using an DMA interrupts
 DCH1SSA = KVA_TO_PA(&Test_str); // Source Address;
 DCH1DSA = KVA_TO_PA(&dump_str); // Destination address.
 DCH1SSIZ = nBytes; // Source size: 
 DCH1DSIZ = nBytes; // Destination size:
 DCH1SPTR = 0; // Source pointer. (bytes past starting address.)
 DCH1DPTR = 0; // Destination pointer. (bytes past starting address.)
 DCH1CSIZ = nBytes; // Bytes transferred per event. (cell size)
 DCH1INTCLR=0x00ff00ff; // DMA1: clear events, disable interrupts
 DCH1CPTR = 0; // Number of bytes that have been transferred since the last event.
 DCH1DAT = 0; // Pattern match data
 IFS4CLR = 0x0003;
 DCH1CONbits.CHEN = 1; // Channel 1 enabled
 
 Time0 = _CP0_GET_COUNT();
 DCH1ECONbits.CFORCE = 1; // Force a channel 1 event.
 while((DCH1INT & 0x08) == 0); // Wait for channel 1 to complete.
 Timef = _CP0_GET_COUNT(); // [TODO] Remove benchmarking
 
 result = DCRCDATA; // Save the CRC
 
 Timet = Timef - Time0;
 TimeS = Timet; 
 TimeS /= 100; 
}