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Hot!PIC18F45K50 Pickit 3 MPLAB X IDE Debugging Fail

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IBrokeIt
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2019/08/13 14:43:02 (permalink)
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PIC18F45K50 Pickit 3 MPLAB X IDE Debugging Fail

Hi all,
 
I have a prototype circuit on breadboard and am able to program it with a Pickit 3 no problem.  I am however not able to debug with the Pickit 3.  Specific error I get (which isn't really too specific I guess) is: 
Programming/Verify complete
The target device is not ready for debugging. Please check your configuration bit settings and program the device before proceeding. The most common causes for this failure are oscillator and/or PGC/PGD settings.
 
So far I have tried running the (internal oscillator) through all of the combinations I could think of and no luck.  I have read through a myriad of posts which suggest that the project need be compiled for debug and loaded for debug as well.  I have tried that and this error persists.  I have tried changing the ICSP lead lengths without results.  I believe this chip has PGC and PGD multiplexed to handle programming/debugging based on config and status of MCLR.  Turned the WDT off just for good measure as well.  Config is as follows:
 
// CONFIG1L
#pragma config PLLSEL = PLL4X // PLL Selection (4x clock multiplier)
#pragma config CFGPLLEN = ON // PLL Enable Configuration bit (PLL Enabled)
#pragma config CPUDIV = NOCLKDIV// CPU System Clock Postscaler (CPU uses system clock (no divide))
#pragma config LS48MHZ = SYS48X8// Low Speed USB mode with 48 MHz system clock (System clock at 48 MHz, USB clock divider is set to 8)
// CONFIG1H
#pragma config FOSC = ECMIO // Oscillator Selection (EC oscillator, high power 16MHz to 48MHz, clock output on OSC2)
#pragma config PCLKEN = ON // Primary Oscillator Shutdown (Primary oscillator enabled)
#pragma config FCMEN = OFF // Fail-Safe Clock Monitor (Fail-Safe Clock Monitor disabled)
#pragma config IESO = OFF // Internal/External Oscillator Switchover (Oscillator Switchover mode disabled)
// CONFIG2L
#pragma config nPWRTEN = OFF // Power-up Timer Enable (Power up timer disabled)
#pragma config BOREN = SBORDIS // Brown-out Reset Enable (BOR enabled in hardware (SBOREN is ignored))
#pragma config BORV = 190 // Brown-out Reset Voltage (BOR set to 1.9V nominal)
#pragma config nLPBOR = OFF // Low-Power Brown-out Reset (Low-Power Brown-out Reset disabled)
// CONFIG2H
#pragma config WDTEN = OFF // Watchdog Timer Enable bits (WDT disabled in hardware (SWDTEN ignored))
#pragma config WDTPS = 32768 // Watchdog Timer Postscaler (1:32768)
// CONFIG3H
#pragma config CCP2MX = RC1 // CCP2 MUX bit (CCP2 input/output is multiplexed with RC1)
#pragma config PBADEN = ON // PORTB A/D Enable bit (PORTB<5:0> pins are configured as analog input channels on Reset)
#pragma config T3CMX = RC0 // Timer3 Clock Input MUX bit (T3CKI function is on RC0)
#pragma config SDOMX = RB3 // SDO Output MUX bit (SDO function is on RB3)
#pragma config MCLRE = ON // Master Clear Reset Pin Enable (MCLR pin enabled; RE3 input disabled)
// CONFIG4L
#pragma config STVREN = ON // Stack Full/Underflow Reset (Stack full/underflow will cause Reset)
#pragma config LVP = ON // Single-Supply ICSP Enable bit (Single-Supply ICSP enabled if MCLRE is also 1)
#pragma config ICPRT = ON // Dedicated In-Circuit Debug/Programming Port Enable (ICPORT enabled)
#pragma config XINST = OFF // Extended Instruction Set Enable bit (Instruction set extension and Indexed Addressing mode disabled)
// CONFIG5L
#pragma config CP0 = OFF // Block 0 Code Protect (Block 0 is not code-protected)
#pragma config CP1 = OFF // Block 1 Code Protect (Block 1 is not code-protected)
#pragma config CP2 = OFF // Block 2 Code Protect (Block 2 is not code-protected)
#pragma config CP3 = OFF // Block 3 Code Protect (Block 3 is not code-protected)
// CONFIG5H
#pragma config CPB = OFF // Boot Block Code Protect (Boot block is not code-protected)
#pragma config CPD = OFF // Data EEPROM Code Protect (Data EEPROM is not code-protected)
// CONFIG6L
#pragma config WRT0 = OFF // Block 0 Write Protect (Block 0 (0800-1FFFh) is not write-protected)
#pragma config WRT1 = OFF // Block 1 Write Protect (Block 1 (2000-3FFFh) is not write-protected)
#pragma config WRT2 = OFF // Block 2 Write Protect (Block 2 (04000-5FFFh) is not write-protected)
#pragma config WRT3 = OFF // Block 3 Write Protect (Block 3 (06000-7FFFh) is not write-protected)
// CONFIG6H
#pragma config WRTC = OFF // Configuration Registers Write Protect (Configuration registers (300000-3000FFh) are not write-protected)
#pragma config WRTB = OFF // Boot Block Write Protect (Boot block (0000-7FFh) is not write-protected)
#pragma config WRTD = OFF // Data EEPROM Write Protect (Data EEPROM is not write-protected)
// CONFIG7L
#pragma config EBTR0 = OFF // Block 0 Table Read Protect (Block 0 is not protected from table reads executed in other blocks)
#pragma config EBTR1 = OFF // Block 1 Table Read Protect (Block 1 is not protected from table reads executed in other blocks)
#pragma config EBTR2 = OFF // Block 2 Table Read Protect (Block 2 is not protected from table reads executed in other blocks)
#pragma config EBTR3 = OFF // Block 3 Table Read Protect (Block 3 is not protected from table reads executed in other blocks)
// CONFIG7H
#pragma config EBTRB = OFF // Boot Block Table Read Protect (Boot block is not protected from table reads executed in other blocks)
 
I'm running out of ideas here and hope it is something fairly obvious I overlooked.  Any help is appreciated!
#1

3 Replies Related Threads

    IBrokeIt
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    Re: PIC18F45K50 Pickit 3 MPLAB X IDE Debugging Fail 2019/08/14 10:01:55 (permalink)
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    Scratch this question.  After some tinkering I have found the missing puzzle piece.  Apparently toggling this on and off (in conjunction with other correct fuse settings) differentiates between debug and program modes...now everything works great.  
     
    #pragma config ICPRT = OFF 
    #2
    ric
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    Re: PIC18F45K50 Pickit 3 MPLAB X IDE Debugging Fail 2019/08/14 13:29:42 (permalink)
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    No, that setting moves the debug connection to the alternate set of pins, it does not turn debugging off and on.
    This IS documented in the PIC datasheet.
     

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    #3
    IBrokeIt
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    Re: PIC18F45K50 Pickit 3 MPLAB X IDE Debugging Fail 2019/08/14 13:58:17 (permalink)
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    Yep, I went back and studied this part in the data sheet just now and it looks like the TQFP version is the only one with a separate ICPGC and ICPGD (I am using the 40 pin DIP).  By setting that to on I tried to set the debugging functionality to something that doesn't exist on my version.  Won't make that mistake again.  Hopefully.  :)
     
    Thanks for the clarification!
    #4
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