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AnsweredHot!How to achieve higher PWM duty resolutions for a given PWM frequency?

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PICrukie
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2019/08/09 09:11:48 (permalink)
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How to achieve higher PWM duty resolutions for a given PWM frequency?

Hello all,
 
I am trying to increase the PWM resolution in a dc-dc converter I've been working on. The PWM frequency is around 100KHz meaning that the PWM timer load value is 199 (up-down count mode) at 40MHz TCY. This gives me only a particular amount of PWM resolution and have found that it is not good enough for the converter. Is there a way I can create a 100KHz at higher count values? That is, a PWM timer load of 1000 instead of something as small as 199?
 
I understand that the FOSC of the primary PLL cannot be increased over 80MHz (FOSC = 40MHz), but I just realized that a dsPIC has an auxiliary PLL, is there a way I could direct the PWM module to use this source as the clock source instead of a Primary PLL that has a 40MHz limit?
 
Thank you!
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du00000001
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Re: How to achieve higher PWM duty resolutions for a given PWM frequency? 2019/08/09 09:16:25 (permalink)
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Which "a dsPIC" is yours ?
Some have a higher-speed clock designed for high-res PWM (with some limitations), others haven't.

PEBKAC / EBKAC / POBCAK / PICNIC (eventually see en.wikipedia.org)
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PICrukie
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Re: How to achieve higher PWM duty resolutions for a given PWM frequency? 2019/08/09 09:33:51 (permalink)
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I am working on a dsPIC33FJ128MC802. 
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MBedder
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Re: How to achieve higher PWM duty resolutions for a given PWM frequency? 2019/08/09 10:21:26 (permalink) ☼ Best Answerby PICrukie 2019/08/09 10:24:51
4.67 (3)
Your dsPIC has a PWM resolution limited by design to 25 nS (40 MHz PWM clock), so at 100 kHz PWM you can get 400 "counts" maximum. To get higher PWM resolution you have to use dsPIC33FxxGS (up to 1 GHz equivalent PWM clock) or dsPIC33CK/CH (up to 4 GHz equivalent PWM clock).
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T Yorky
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Re: How to achieve higher PWM duty resolutions for a given PWM frequency? 2019/08/11 05:31:37 (permalink)
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Worked with the FJ128MC802 quite a lot.
Although the data sheet does not identify it in the intro, the PWM resolution is half an instruction cycle (actual clock). That is it is good for 12.5ns at 40MHz(80MHz clk). The period reg is 15bit, the compare reg is 16 bit.
However if you use the centre aligned mode, this doubles the period so this resolution is lost. Back to 25ns.
Do you need centre aligned?
You can introduce a jitter for an extra bit/2 bits of resolution. This can be done with software in the PWM interrupt. The centre align mode allows interrupt at mid-point aswell.
eg calc value is 257. PWM reg Cycle 1: 64. Cyc 2: 64. Cyc 3: 65. Cyc 4 64.
 
Regards.
T Yorky.
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PICrukie
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Re: How to achieve higher PWM duty resolutions for a given PWM frequency? 2019/08/12 08:24:12 (permalink)
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@T Yorky, 
I am working on an interleaved type converter and will be needing a PWM signal along with its 180-degree phase-shifted version of the same. I am achieving this by an up/down count mode and using two compare values, one mirrored to another across the midway count value and taking the non-inverting and the inverting PWM outputs. Long story short, I will need an up/down counter. Achieving the same PWM waveforms with an up counter is rather difficult. I believe I'll have to live with the low-resolution problems or switch to a higher resolution PIC, the likes mentioned by MBedder.
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