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Hot!ICD 3 and dsPIC33EV256GM106 troobleshoot : The target device is not ready for debugging.

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XavierB
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2019/07/24 06:03:12 (permalink)
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ICD 3 and dsPIC33EV256GM106 troobleshoot : The target device is not ready for debugging.

Hello everyone,
 
I am currently working on a project using a dsPIC33EV256GM106. This Microchip is implemented on a custom board providing 5V between the Vdd/Avdd and Vss/Avss pins and a RJ45 wire connection for ICD 3 (using PGEC1 and PGED1 input/output pins).
 
I had a lot of problem with this custom board (which in fact wasn't designed by myself) and I had to fix and change some settings to finally be able to program the device.
 
My problem is the following :
 
I am trying to debug my program on the device, using ICD 3 and MPLAB X on Linux (on PGEC1 and PGED1). But an error message is displayed in the ICD 3 window (see ICD 3 verbose and error).
 
So, after a lot of research on manuals (Data sheet, RF, ICD 3 user's guide, ICD 3 design advisory) and some modifications made on the PCB for Avdd and Avss and Vcap, I still have this issue.
I have tried to set the internal oscillator (FRC), disable the watchdog, set the FICD register to PGD1, disable every code protection by using preprocessor configuration bits and also the _Macros. Still the problem persists (see Configuration code).
 
I am really confused by the fact that the device can be programmed and can execute a simple blink Led code but can't be debugged.
 
So I am asking myself those questions :
 
- Am I missing something on the device configuration bits ?
- Is there an alternative way to configure those bits (like using assembly language) (I have tried to check the memory but don't know how to interpret the .hex file)
- I have noticed a resistor of 470 ohm on both PGC and PGD wires. Can it induce problems for debugger ?
- No external oscillator is present on the board. Should I use one or is FRC good enough for debug ?
 
Thank you in advance for any suggestion you could provide me.
 
Yours sincerely. 
 
Xavier
 
Complementary Information :
 
- ICD 3 is perfectly working with dsPIC30.
- the dsPIC33 can be programmed using ICD 3.
- the dsPIC33 is executing the blink program correctly.
- MBLAB version :
Product Version: MPLAB X IDE v5.20
Java: 1.8.0_181; Java HotSpot(TM) 64-Bit Server VM 25.181-b13
Runtime: Java(TM) SE Runtime Environment 1.8.0_181-b13
System: Linux version 4.15.0-54-generic running on amd64; UTF-8; fr_FR (mplab)
- IDC 3 to Microchip pins : CLK checked with a 10450 ohm pull-up resistor, Vdd ok, Vss ok, PGD and PGC with a 450 ohm resistor (?).
- Other information can be provided.
 
ICD 3 verbose and error :
 
*****************************************************

Connecting to MPLAB ICD 3...

Currently loaded firmware on ICD 3
Firmware Suite Version.....01.56.00
Firmware type..............dsPIC33E/24E

Target voltage detected
Target device dsPIC33EV256GM106 found.
Device Revision ID = 4006

Device Erased...

Programming...

The following memory area(s) will be programmed:
program memory: start address = 0x0, end address = 0x5ff
Programming/Verify complete
The target device is not ready for debugging. Please check your configuration bit settings and program the device before proceeding. The most common causes for this failure are oscillator and/or PGC/PGD settings.



Macro configuration bits :
 
_FSEC(BWRP_OFF & BSS_DISABLED & BSS2_OFF & GWRP_OFF & GSS_DISABLED & CWRP_OFF & CSS_DISABLED & AIVTDIS_DISABLE); //Disable table/code/program/whatever protect
_FOSCSEL(FNOSC_FRC & IESO_ON); //Fast oscillator selected
//_FOSC(OSCIOFNC_OFF); //Primary oscillator off
_FICD(ICS_PGD1); //Chossing PGEC1 and PGED1 for debugging
_FWDT(FWDTEN_OFF); //setting off the Watch dog timer

 
Or preprocessor Configuration bits :
 
// FSEC
#pragma config BWRP = OFF // Boot Segment Write-Protect Bit (Boot Segment may be written)
#pragma config BSS = DISABLED // Boot Segment Code-Protect Level bits (No Protection (other than BWRP))
#pragma config BSS2 = OFF // Boot Segment Control Bit (No Boot Segment)
#pragma config GWRP = OFF // General Segment Write-Protect Bit (General Segment may be written)
#pragma config GSS = DISABLED // General Segment Code-Protect Level bits (No Protection (other than GWRP))
#pragma config CWRP = OFF // Configuration Segment Write-Protect Bit (Configuration Segment may be written)
#pragma config CSS = DISABLED // Configuration Segment Code-Protect Level bits (No Protection (other than CWRP))
#pragma config AIVTDIS = DISABLE // Alternate Interrupt Vector Table Disable Bit (Disable Alternate Vector Table)

// FBSLIM
#pragma config BSLIM = 0x1FFF // Boot Segment Code Flash Page Address Limit Bits (Enter Hexadecimal value)

// FOSCSEL
#pragma config FNOSC = FRC // Initial oscillator Source Selection Bits (Internal Fast RC (FRC) Oscillator with divide by 16)
#pragma config IESO = OFF // Two Speed Oscillator Start-Up Bit (Start up device with FRC,then automatically switch to user selected oscillator source)

// FOSC
#pragma config POSCMD = NONE // Primary Oscillator Mode Select Bits (Primary Oscillator disabled)
#pragma config OSCIOFNC = OFF // OSC2 Pin I/O Function Enable Bit (OSC2 is clock output)
#pragma config IOL1WAY = ON // Peripheral Pin Select Configuration Bit (Allow Only One reconfiguration)
#pragma config FCKSM = CSDCMD // Clock Switching Mode Bits (Both Clock Switching and Fail-safe Clock Monitor are disabled)
#pragma config PLLKEN = ON // PLL Lock Enable Bit (Clock switch to PLL source will wait until the PLL lock signal is valid)

// FWDT
#pragma config WDTPOST = PS32768 // Watchdog Timer Postscaler Bits (1:32,768)
#pragma config WDTPRE = PR128 // Watchdog Timer Prescaler Bit (1:128)
#pragma config FWDTEN = OFF // Watchdog Timer Enable Bits (WDT and SWDTEN Disabled)
#pragma config WINDIS = OFF // Watchdog Timer Window Enable Bit (Watchdog timer in Non-Window Mode)
#pragma config WDTWIN = WIN25 // Watchdog Window Select Bits (WDT Window is 25% of WDT period)

// FPOR
#pragma config BOREN0 = OFF // Brown Out Reset Detection Bit (BOR is Enabled)

// FICD
#pragma config ICS = PGD1 // ICD Communication Channel Select Bits (Communicate on PGEC1 and PGED1)

// FDMTINTVL
#pragma config DMTIVTL = 0xFFFF // Lower 16 Bits of 32 Bit DMT Window Interval (Enter Hexadecimal value)

// FDMTINTVH
#pragma config DMTIVTH = 0xFFFF // Upper 16 Bits of 32 Bit DMT Window Interval (Enter Hexadecimal value)

// FDMTCNTL
#pragma config DMTCNTL = 0xFFFF // Lower 16 Bits of 32 Bit DMT Instruction Count Time-Out Value (Enter Hexadecimal value)

// FDMTCNTH
#pragma config DMTCNTH = 0xFFFF // Upper 16 Bits of 32 Bit DMT Instruction Count Time-Out Value (Enter Hexadecimal value)

// FDMT
#pragma config DMTEN = DISABLE // Dead Man Timer Enable Bit (Dead Man Timer is Disabled and can be enabled by software)

// FDEVOPT
#pragma config PWMLOCK = OFF // PWM Lock Enable Bit (Certain PWM registers may only be written after key sequence)
#pragma config ALTI2C1 = OFF // Alternate I2C1 Pins Selection Bit (I2C1 mapped to SDA1/SCL1 pins)

// FALTREG
#pragma config CTXT1 = NONE // Interrupt Priority Level (IPL) Selection Bits For Alternate Working Register Set 1 (Not Assigned)
#pragma config CTXT2 = NONE // Interrupt Priority Level (IPL) Selection Bits For Alternate Working Register Set 2 (Not Assigned)

#1

14 Replies Related Threads

    du00000001
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    Re: ICD 3 and dsPIC33EV256GM106 troobleshoot : The target device is not ready for debuggin 2019/07/26 10:04:01 (permalink)
    0
    Provided everything else is fine (e.g. you're really connected to PGD1, no interfering hardware connected to the same pins etc.):

    PEBKAC / EBKAC / POBCAK / PICNIC (eventually see en.wikipedia.org)
    #2
    drmike
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    Re: ICD 3 and dsPIC33EV256GM106 troobleshoot : The target device is not ready for debuggin 2019/08/04 15:10:39 (permalink)
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    I have the same problem but with dsPIC33CK256MP508.  I first set up the config to use FRCPLL, and then tried just FRC:

    #pragma config FNOSC = FRC    //Oscillator Source Selection->Internal Oscillator
    #pragma config IESO = OFF    //Two-speed Oscillator Start-up Enable bit->Start up with user-selected oscillator source

    // FOSC
    #pragma config POSCMD = NONE    //Primary Oscillator Mode Select bits-> not used
    #pragma config OSCIOFNC = ON    //OSC2 Pin Function bit->OSC2 is general purpose digital I/O pin
    #pragma config FCKSM = CSDCMD    //Clock Switching Mode bits-> Clock switching disabled Fail-safe, Clock Monitor  disabled
    #pragma config PLLKEN = OFF    //PLL Lock Status Control->PLL lock signal will be used to disable PLL clock output if lock is lost
    //#pragma config XTCFG = G3    //XT Config->24-32 MHz crystals
    //#pragma config XTBST = DISABLE    //XT Boost-> no boost

    // FWDT
    #pragma config RCLKSEL = LPRC    //Watchdog Timer Clock Select bits->Always use LPRC
    #pragma config WINDIS = OFF    //Watchdog Timer Window Enable bit->Watchdog Timer in Window mode
    #pragma config WDTWIN = WIN25    //Watchdog Timer Window Select bits->WDT Window is 25% of WDT period
    #pragma config FWDTEN = ON_SW    //Watchdog Timer Enable bit->WDT controlled via SW, use WDTCON.ON bit

    // FPOR
    #pragma config BISTDIS = DISABLED    //Memory BIST Feature Disable->mBIST on reset feature disabled

    // FICD
    #pragma config ICS = PGD2    //ICD Communication Channel Select bits->Communicate on PGC2 and PGD2
    #pragma config JTAGEN = OFF    //JTAG Enable bit->JTAG is disabled
    #pragma config NOBTSWP = DISABLED    //BOOTSWP instruction disable bit->BOOTSWP instruction is disabled

     I get the exact same output as the original poster.  Since it programs, the ICD3 is working, but it doesn't know which port to actually debug with.  How do I tell it to use the right port?
    Mike
    #3
    ric
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    Re: ICD 3 and dsPIC33EV256GM106 troobleshoot : The target device is not ready for debuggin 2019/08/04 15:28:18 (permalink)
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    drmike
    How do I tell it to use the right port?

    This line is telling it which port to use:
    #pragma config ICS = PGD2    //ICD Communication Channel Select bits->Communicate on PGC2 and PGD2

     

    I also post at: PicForum
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    NEW USERS: Posting images, links and code - workaround for restrictions.
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    #4
    drmike
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    Re: ICD 3 and dsPIC33EV256GM106 troobleshoot : The target device is not ready for debuggin 2019/08/04 16:21:39 (permalink)
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    So it's got to be a clock problem for my case.
    Is it possible to set OSCCON, CLKDIV, PLLFBD and PLLDIV using #pragma statements?
     
    #5
    drmike
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    Re: ICD 3 and dsPIC33EV256GM106 troobleshoot : The target device is not ready for debuggin 2019/08/04 17:37:59 (permalink)
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    I decided to try to just flip a bit and see what happens.  It programmed, the bit did not flip (one more thing to figure out), but when I went to debug it with a break point at main - it worked!  I then tried to run the clock initialize routine, and it gave me the "debugger not ready" error.  So clearly I have a clock set up problem. 
     
    So the debugger works, but not with the PLL as I have it set up.  Is there a maximum speed the debugger can run at?  The default is 150 MHz for Fosc => 75 MHz fcy.  It's also possible the PLL is not locking.  What ever is happening is breaking the debugger, so using the debugger to figure out what is wrong is problematic.  If anyone has any hints I will give them a shot.
     
     
    #6
    ric
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    Re: ICD 3 and dsPIC33EV256GM106 troobleshoot : The target device is not ready for debuggin 2019/08/04 17:56:55 (permalink)
    0
    What are you using for Vcap?
    The filtering on that pin is critical when you're using the PLL.
     

    I also post at: PicForum
    Links to useful PIC information: http://picforum.ric323.co...opic.php?f=59&t=15
    NEW USERS: Posting images, links and code - workaround for restrictions.
    To get a useful answer, always state which PIC you are using!
    #7
    drmike
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    Re: ICD 3 and dsPIC33EV256GM106 troobleshoot : The target device is not ready for debuggin 2019/08/04 18:17:14 (permalink)
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    That is a really good question.  I will look at the PIM and see if there is something I should add because they assume it is actually there on a plug in board.  I'm just using the PIM to hold the processor.  It has a few bypass caps on it, but I haven't looked carefully at the schematic.  The 3.3 supply is pretty good, but I should measure it carefully just in case there is more noise than I think.  Should keep me busy tomorrow!
    Thanks.
    #8
    Ken_Pergola
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    Re: ICD 3 and dsPIC33EV256GM106 troobleshoot : The target device is not ready for debuggin 2019/08/04 18:51:56 (permalink)
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    Hi Mike,
     
    As Ric alluded to change your #pragma to match how you wired your connections to ensure debugging is possible:
     
    Change from '2' to '1'. In your first post you said you were using channel '1':
     
    #pragma config ICS = PGD1 //ICD Communication Channel Select bits->Communicate on PGC1 and PGD1

     
    If your connections don't match the channel in the '#pragma', debugging will not work.
     
    I hope this helps -- I did not have time to read the whole thread carefully.
     
    Best regards,
     
    Ken
    post edited by Ken_Pergola - 2019/08/04 18:53:24
    #9
    du00000001
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    Re: ICD 3 and dsPIC33EV256GM106 troobleshoot : The target device is not ready for debuggin 2019/08/05 01:12:56 (permalink)
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    @ drmike
    'EV and 3.3 V supply? I'm astonished that it should work at all.
    The 'EV is a 5 V device (4.5 - 5.5 V) !!!

    PEBKAC / EBKAC / POBCAK / PICNIC (eventually see en.wikipedia.org)
    #10
    drmike
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    Re: ICD 3 and dsPIC33EV256GM106 troobleshoot : The target device is not ready for debuggin 2019/08/05 06:14:23 (permalink)
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    My device is a 33CK - it's 3.3V: https://www.microchip.com/wwwproducts/en/dsPIC33CK256MP508
    I'm sure I have the ICD set correctly.  I'm NOT sure I have all the voltage pins set correctly.  The  PIM has capacitors on it, all .1 uF except on the AVDD which has both .1 and 1 uF.  I'm sure the PIM is ok, I'm not sure every single power and ground is correct.  I will check that this evening.
     
    That last thing I did was step through with the debugger (YEAH!!) up to the line that flipped the OSWEN bit.  At that point I got an infinite loop of "The target device is not ready for debugging".  I had to exit MPLAB to terminate that problem.  This is great progress, I know the problem is with the PLL set up.  It could be a power issue, or it could be I forgot a bit that is inconsistent with how I'm operating the device. 
     
    Thank you everyone for the advice and hints.  I'll be back in 10+ hours with more questions.
    Mike
    #11
    du00000001
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    Re: ICD 3 and dsPIC33EV256GM106 troobleshoot : The target device is not ready for debuggin 2019/08/05 06:28:28 (permalink)
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    @ drmike
     
    Oh, you've seized another thread? Missed that or you might have gotten bashed sooner  :(
    When your controller doesn't match the headline ...
     
    The PLL has 2 preconditions:
    1. Very stable supply voltage(s). (Otherwise it won't lock.)
    2. Correct setting up of the input frequency and the divider(s).
        Similar to the above: otherwise it won't work.

    PEBKAC / EBKAC / POBCAK / PICNIC (eventually see en.wikipedia.org)
    #12
    drmike
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    Re: ICD 3 and dsPIC33EV256GM106 troobleshoot : The target device is not ready for debuggin 2019/08/05 09:00:39 (permalink)
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    Yes, it was the closest one with the same problem. 
     
    At least I've got the debugger to connect, so most of the supply is correct.  I doubt stability is an issue, it looks good on the scope, but I haven't checked the AC ripple carefully. I might have missed a connection though, there are 5 each of power and ground.  One missed pin could do it.
     
    I'm trying to leave the initial PLL in default conditions.  With the FRC driving it, that should work.  I should probably re-read the PLL section of the manual again to make sure I understand all the details.
    #13
    du00000001
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    Re: ICD 3 and dsPIC33EV256GM106 troobleshoot : The target device is not ready for debuggin 2019/08/05 09:24:51 (permalink)
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    drmike
    I should probably re-read the PLL section of the manual again to make sure I understand all the details.

    That for sure won't hurt.
     
    But if you missed some supply connection(s), the µC might already be damaged to some extend. Depending on what you actually forgot to connect...

    PEBKAC / EBKAC / POBCAK / PICNIC (eventually see en.wikipedia.org)
    #14
    drmike
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    Re: ICD 3 and dsPIC33EV256GM106 troobleshoot : The target device is not ready for debuggin 2019/08/05 18:46:38 (permalink)
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    It looks like an under voltage problem.  When the debugger starts, I have 3.3, and then it slowly drops.  My regulator is not regulating properly.  I also had loose connections to the PIM, so it is possible I destroyed the regulator with my mess of wires when I moved things around.   The fact that the debugger works when the power is correct is a good sign I've got the main connections correct and the #pragma statements correct.  It is just a matter of ensuring the power is actually stable.  Once I turn on the PLL the regulator dies, so it is most likely not capable of supplying the current required.  Time to read more datasheets....
     
    Thank you for all the help everyone.  I know what to do to ensure this works like it is supposed to.
    Mike
    #15
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