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Hot!Solved Pic18F26k83 CIOCONbits.CLKSEL=1 not working for me

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FR3D
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2019/07/15 05:46:55 (permalink)
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Solved Pic18F26k83 CIOCONbits.CLKSEL=1 not working for me

Hello,
 
I want to run the can controller from the external oscillator.
I've choosen the same frequency for internal and external clock.
 
If I drive the can controller together with the internal system OR external system clock it is working well.
If I want to drive the Can controller from the external oscillator while letting the system running with the internal system clock - the program is not working any more.
 
The Can isn't able to receive any frames any more ...
do I have to readjust the can timing ? 
 
 
SOLVED
 
I had to set
#pragma config FEXTOSC = XT
 
best regards FR3D
post edited by FR3D - 2019/07/16 01:39:26
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    tam07
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    Re: Solved Pic18F26k83 CIOCONbits.CLKSEL=1 not working for me 2019/07/16 02:39:17 (permalink)
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    Hi FR3D,
     
    No, you cannot use both internal and external clock simultaneously.
     
    As defined on p.643 of the PIC18F26K83 datasheet:
    CLKSEL: CAN Clock Source Selection
    1 = CAN clock is sourced by the clock selected by the FEXTOSC Configuration bit field, regardless of system clock
    0 = CAN clock is sourced from the system clock
    When CLKSEL = 0,
    • CAN_clock = System_clock
    • This is always true whether an internal OR external oscillator is used.
    When CLKSEL = 1,
    • [CAN_clock = External_clock] AND [System_clock = External_clock/clock_divider]; or,
    • if PLL is enabled, [CAN_clock = External_clock] AND [System clock = (External_clock*4)/clock_divider]
    • Hence, an external clock should always be implemented when CLKSEL = 1.
     
    Also, from p.643:
    Note 1: When CLKSEL = 1, the clock supplied by FEXTOSC must be less than or equal to the system clock. If the CAN clock is greater than the system clock, unexpected behavior will occur.
    So for the CAN peripheral to function properly:
    • When EXTOSC 4xPLL is disabled, clock divider should always be set to '1'; or else, CAN_clock > System_clock
    • When EXTOSC 4xPLL is enabled, the maximum clock divider should be '4'; or else, CAN_clock > System_clock
     
    Hope this helps :)
     
    Regards,
    Tam
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