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AnsweredHot!dsPIC33EP NVM (Flash) @ 64MHz (64 MIPS) Problem - Solved

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noobita
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2019/07/07 06:43:38 (permalink)
0

dsPIC33EP NVM (Flash) @ 64MHz (64 MIPS) Problem - Solved

Good afternoon,
 
I have an application, running in a dsPIC33EP256MU806, where some variables are stored in NVM. This variables, at the beggining of the code are read from the NVM and can be stored in the NVM in any moment (during runtime). 
 
With my application running @ 16 MHz (16 MIPS) everything works fine, i can read the variables from memory correctly and store them correctly. Unfortunately, 16 MHz (16 MIPS) wasn't enough for the application, and i had to increase the clock to 64 MHz (64 MIPS). No modification were made to the code (just some minor changes for timers, etc), but now the write to the NVM memory doesn't work. I can't update the store value and so, when i read, i read the default value of 65535.  
 
Has anyone come across with this problem? How did you solved it?
 
Also, i was wondering (if anyone has a solution for this), if it is possible to change dynamically the clock frequency of the dsPIC33EP? So when a write and read from NVM is done, is done using 16 MHz (which i know it works) and then i reset the clock to the 64 MHz (64 MIPS).
 
Here is the code that is called to write/read from the NVM/flash:
 

 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
#include <xc.h>
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
#include <stdlib.h>
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
#include <string.h>
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
#include <libpic30.h>
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
const uint16_t __attribute__((space(prog), aligned(_FLASH_PAGE*2)))
dat[_FLASH_PAGE] = {0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF
};



// takes ~20ms
FlashError write_flash(uint16_t *buffer, unsigned offset, unsigned len) {
SET_CPU_IPL(7);
long aux_row[_FLASH_ROW];
uint16_t aux_page[_FLASH_PAGE];
uint16_t *tmp = aux_page;
uint16_t i;


for (i=0; i<_FLASH_PAGE; i++) {
aux_page[i] = 0xFFFF;
}

for (i=0; i<_FLASH_ROW; i++) {
aux_row[i] = 0xFFFF;
}

_prog_addressT p;
_init_prog_address(p, dat);

if (buffer == NULL) {
return FNULL_PTR;
}

if (offset+len > _FLASH_ROW) {
return FOUT_OF_BOUNDS;
}

_memcpy_p2d16(aux_page, p, _FLASH_PAGE);
for (i=0; i<len; i++) {
tmp[i+offset] = buffer[i];
}

_erase_flash(p);
_write_flash16(p, tmp);


SET_CPU_IPL(3);
return FSUCCESS;
}

FlashError read_flash (uint16_t *buffer, unsigned offset, unsigned len) {

SET_CPU_IPL(7);
_prog_addressT p;

if (buffer == NULL) {
return FNULL_PTR;
}

if (offset+len > _FLASH_ROW) {
return FOUT_OF_BOUNDS;
}


_init_prog_address(p, dat);
_memcpy_p2d16(buffer, p+2*offset, 2*len);

SET_CPU_IPL(3);
return FSUCCESS;
}


 
Best regards
 
EDIT
 
Clarified what was meant with clock frequency (talking about FCY, 16 MHz is 16 MIPS annd 64 MHz is 64 MIPS).
post edited by noobita - 2019/07/08 06:52:52
#1
MBedder
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Re: dsPIC33EP NVM (Flash) @ 64MHz Problem 2019/07/07 07:23:06 (permalink)
5 (1)
There is a severe error in line #47 of your code. Fix it and come back when done.
#2
noobita
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Re: dsPIC33EP NVM (Flash) @ 64MHz Problem 2019/07/07 07:54:18 (permalink)
5 (1)
MBedder
There is a severe error in line #47 of your code. Fix it and come back when done.

 
I think you have replied to the wrong post. I haven't posted any code.
 
Best regards
 
#3
MBedder
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Re: dsPIC33EP NVM (Flash) @ 64MHz Problem 2019/07/07 08:32:08 (permalink)
4.67 (3)
Oh really? I haven't noticed that! LoLLoLLoL
#4
davekw7x
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Re: dsPIC33EP NVM (Flash) @ 64MHz Problem 2019/07/07 11:20:54 (permalink)
5 (1)
MBedder
Oh really? I haven't noticed that!



To the OP: If you post your code, someone might be able to help you get to the bottom of things.  (See Footnote)  If we can't find anything "wrong" with your code, we may ask to see a schematic or at least a description of your hardware.
 
Bottom line: I have no problems writing to Program Memory Flash at 64 MIPS.
 
Tested on dsPIC33E USB Starter Kit (dsPIC33EP512MU810) with XC16 version 1.36 code based on the sequences in Section 5 of the dsPICe33E Family Reference Manual (DS70609)
 
Regards,

Dave
Footnote: I disagree with MBedder.  The answer is 42: https://en.wikipedia.org/...7s_Guide_to_the_Galaxy
After another 7 million years, we have now discovered the (unasked by you) multi-part question: "What is wrong with my code?  Could it be a compiler optimization problem? Or is it my hardware?  Or is it my test methodology?"
    Nop();
    Nop();


post edited by davekw7x - 2019/07/07 12:34:36

Sometimes I just can't help myself...
#5
ric
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Re: dsPIC33EP NVM (Flash) @ 64MHz Problem 2019/07/07 13:32:51 (permalink)
5 (1)
[ Bug in code ] + [ Code not supplied ] = [ Can't help ]
 
For what it's worth, my guess is incorrect waiting for "write complete" in the NVM writing code, but of course that's just a guess without seeing it.
 
 

I also post at: PicForum
Links to useful PIC information: http://picforum.ric323.co...opic.php?f=59&t=15
NEW USERS: Posting images, links and code - workaround for restrictions.
To get a useful answer, always state which PIC you are using!
#6
noobita
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Re: dsPIC33EP NVM (Flash) @ 64MHz Problem 2019/07/07 14:23:31 (permalink)
0
Sorry about that, here is the code:
 

#include <xc.h>
#include <stdlib.h>
#include <string.h>
#include <libpic30.h>
 
const uint16_t __attribute__((space(prog), aligned(_FLASH_PAGE*2)))
dat[_FLASH_PAGE] = {0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF
};



// takes ~20ms
FlashError write_flash(uint16_t *buffer, unsigned offset, unsigned len) {
SET_CPU_IPL(7);
long aux_row[_FLASH_ROW];
uint16_t aux_page[_FLASH_PAGE];
uint16_t *tmp = aux_page;
uint16_t i;


for (i=0; i<_FLASH_PAGE; i++) {
aux_page[i] = 0xFFFF;
}

for (i=0; i<_FLASH_ROW; i++) {
aux_row[i] = 0xFFFF;
}

_prog_addressT p;
_init_prog_address(p, dat);

if (buffer == NULL) {
return FNULL_PTR;
}

if (offset+len > _FLASH_ROW) {
return FOUT_OF_BOUNDS;
}

_memcpy_p2d16(aux_page, p, _FLASH_PAGE);
for (i=0; i<len; i++) {
tmp[i+offset] = buffer[i];
}

_erase_flash(p);
_write_flash16(p, tmp);


SET_CPU_IPL(3);
return FSUCCESS;
}

FlashError read_flash (uint16_t *buffer, unsigned offset, unsigned len) {

SET_CPU_IPL(7);
_prog_addressT p;

if (buffer == NULL) {
return FNULL_PTR;
}

if (offset+len > _FLASH_ROW) {
return FOUT_OF_BOUNDS;
}


_init_prog_address(p, dat);
_memcpy_p2d16(buffer, p+2*offset, 2*len);

SET_CPU_IPL(3);
return FSUCCESS;
}


 
As mentioned previously, code works just fine for program compiled for 16MHz frequency clock. I will update first post also.
 
Best regards and thanks
post edited by noobita - 2019/07/07 14:32:24
#7
davekw7x
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Re: dsPIC33EP NVM (Flash) @ 64MHz Problem 2019/07/07 16:10:29 (permalink)
5 (1)
noobita
...here is the code...
...code works just fine for program compiled for 16MHz frequency clock.

First of all, when you said it didn't work for a frequency of 64 MHz it wasn't clear whether you meant system clock of 64 MHz or instruction frequency of 64 MHz.
To take it to the extreme, I tested your code at 70 MIPS (system clock of 140 MHz).  I verified FCY = 70000000 by toggling an LED in a loop controlled by __delay_ms(1000) and visually verified a one second toggle interval.

Main points of my test:
  • I used your (unmodified) flash read and write functions.
  • I added a couple of definitions to make it compile, and a useful function to interpret the value returned from them.
  • Note that programming may reset the device and start it running one or more times, so when testing, I always make sure it doesn't start writing to Flash before it is ready.  I use a pushbutton switch to make it wait.  If my board didn't have a convenient input for such a thing, I would simply put in a delay of a couple of seconds.
  • I never depend on a debugger or anything else for testing this kind of stuff.  I used a UART and printf to show the results.
[Edit]
Lame-brained bug here: Didn't read it back to verify changes.  The original write_flash() has a bug that was not uncovered because I didn't test it properly!  Later post shows how to fix the actual bug.
[/Edit]

// DSPIC33EP512MU810 Configuration Bit Settings

// 'C' source line config statements

// FGS
#pragma config GWRP = OFF               // General Segment Write-Protect bit (General Segment may be written)
#pragma config GSS = OFF                // General Segment Code-Protect bit (General Segment Code protect is disabled)
#pragma config GSSK = OFF               // General Segment Key bits (General Segment Write Protection and Code Protection is Disabled)

// FOSCSEL
#pragma config FNOSC = FRC              // Initial Oscillator Source Selection Bits (Internal Fast RC (FRC))
#pragma config IESO = ON                // Two-speed Oscillator Start-up Enable bit (Start up device with FRC, then switch to user-selected oscillator source)

// FOSC
#pragma config POSCMD = HS              // Primary Oscillator Mode Select bits (HS Crystal Oscillator Mode)
#pragma config OSCIOFNC = OFF           // OSC2 Pin Function bit (OSC2 is clock output)
#pragma config IOL1WAY = OFF            // Peripheral pin select configuration (Allow multiple reconfigurations)
#pragma config FCKSM = CSECME           // Clock Switching Mode bits (Both Clock switching and Fail-safe Clock Monitor are enabled)

// FWDT
#pragma config WDTPOST = PS32768        // Watchdog Timer Postscaler Bits (1:32,768)
#pragma config WDTPRE = PR128           // Watchdog Timer Prescaler bit (1:128)
#pragma config PLLKEN = ON              // PLL Lock Wait Enable bit (Clock switch to PLL source will wait until the PLL lock signal is valid.)
#pragma config WINDIS = OFF             // Watchdog Timer Window Enable bit (Watchdog Timer in Non-Window mode)
#pragma config FWDTEN = OFF             // Watchdog Timer Enable bit (Watchdog timer enabled/disabled by user software)

// FPOR
#pragma config FPWRT = PWR128           // Power-on Reset Timer Value Select bits (128ms)
#pragma config BOREN = ON               // Brown-out Reset (BOR) Detection Enable bit (BOR is enabled)
#pragma config ALTI2C1 = OFF            // Alternate I2C pins for I2C1 (SDA1/SCK1 pins are selected as the I/O pins for I2C1)
#pragma config ALTI2C2 = OFF            // Alternate I2C pins for I2C2 (SDA2/SCK2 pins are selected as the I/O pins for I2C2)

// FICD
#pragma config ICS = PGD1               // ICD Communication Channel Select bits (Communicate on PGEC1 and PGED1)
#pragma config RSTPRI = PF              // Reset Target Vector Select bit (Device will obtain reset instruction from Primary flash)
#pragma config JTAGEN = OFF             // JTAG Enable bit (JTAG is disabled)

// FAS
#pragma config AWRP = OFF               // Auxiliary Segment Write-protect bit (Auxiliary program memory is not write-protected)
#pragma config APL = OFF                // Auxiliary Segment Code-protect bit (Aux Flash Code protect is disabled)
#pragma config APLK = OFF               // Auxiliary Segment Key bits (Aux Flash Write Protection and Code Protection is Disabled)

// #pragma config statements should precede project file includes.
// Use project enums instead of #define for ON and OFF.

#include <xc.h>

#include <stdio.h>
#include <stdlib.h>

/*
 * dsPIC33 USB Starter Kit
 * LEDs on RD0, RD1, RD2
 * Switches on RD6, RD7, RD13
 *
 * 8 MHz crystal
 *
 * My UART Connections:
 *
 * U1 at 115200 Baud
 *    Tx on RF5
 *    Rx on RF4
 */

#ifdef __dsPIC33EP512MU810__
#define CPU "dsPIC33EP512MU810"
#else
#define CPU "???"
#endif

#define MIPS 70
#define FCY (MIPS*1000000UL)
#include <libpic30.h>

// Definitions for LED and SW functionality go here

// From davekw7x: Just for kicks, I initialized the first four words.
const uint16_t __attribute__((space(prog), aligned(_FLASH_PAGE * 2)))
dat[_FLASH_PAGE] = {
    //0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
    0x1234, 0x5678, 0x9ABC, 0x0000, 0xFFFF, 0xFFFF, 0xFFFF,
    0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
    // For purposes of testing, I left out the remaining initializer
    // list.  They will all be set to zeros, but I don't look at them here.
};

// Zero meahs it's good.  Negative value for error
typedef enum {

    FNULL_PTR = -2,
    FOUT_OF_BOUNDS, //-1
    FSUCCESS        // 0
} FlashError;

// Make it easy to see what the return value means by returning
// a pointer to a string literal.
//
const char * decode_FlashError(FlashError err)
{
    switch (err) {
    case FNULL_PTR:
        return "FNULL_PTR";
        break;

    case FOUT_OF_BOUNDS:
        return "FOUT_OF_BOUNDS";
        break;

    case FSUCCESS:
        return "FSUCCESS";
        break;

    default:
        return "???";
        break;

    } // End switch
} // End of print_FlashError

void init_system(void);

FlashError read_flash(uint16_t *buffer, unsigned offset, unsigned len);
FlashError write_flash(uint16_t *buffer, unsigned offset, unsigned len);

int main()
{
    // Save an entire page of 1024 words to allow preservation
    // of data that you want to preserve.
    //
    uint16_t ram_data[_FLASH_PAGE];

    // Initialize clock, I/O, UART, etc...
    init_system();
    printf("\r\nCompiled on %s at %s by XC16 version %u\r\n",
            __DATE__, __TIME__, __XC16_VERSION);
    printf("CPU is %s running at %u MIPS\r\n", CPU, MIPS);

    FlashError retval;
    const char *error_str;
    // Will read five words for this test
    unsigned len = 5;
    retval = read_flash(ram_data, 0, len);
    error_str = decode_FlashError(retval);
    printf("read_flash() returned %s\r\n", error_str);

    printf("Initially\r\n");
    int i;
    for (i = 0; i < 5; i++) {
        printf("ram_data[%u] = 0x%04X\r\n", i, ram_data[i]);
    }
    printf("\r\n");

    printf("Press SW1 to begin erase/write test: ");
    while (!SW1_ISPRESSED())
        ;
    printf("\r\n\r\n");
    ram_data[0] += 0x5555;
    ram_data[1] += 0x6666;
    printf("Writing 0x%04X 0x%04X to the first two words\r\n",
            ram_data[0], ram_data[1]);

    retval = write_flash(ram_data, 0, 2);
    error_str = decode_FlashError(retval);
    printf("write_flash() returned %s\r\n", error_str);
        for (i = 0; i < 5; i++) {
        printf("ram_data[%u] = 0x%04X\r\n", i, ram_data[i]);
    }
    printf("\r\n");

    // Observe 1 second toggle interval to verify that FCY is really what
    // we intended.
    while (1) { // main loop
        LED2 = SW1;
        LED1_Toggle();
        __delay_ms(1000);
    } // End of main loop
} // End of main();


Output
Compiled on Jul  7 2019 at 15:48:04 by XC16 version 1036
CPU is dsPIC33EP512MU810 running at 70 MIPS
read_flash() returned FSUCCESS
Initially
ram_data[0] = 0x1234
ram_data[1] = 0x5678
ram_data[2] = 0x9ABC
ram_data[3] = 0x0000
ram_data[4] = 0xFFFF

Press SW1 to begin erase/write test:

Writing 0x6789 0xBCDE to the first two words
write_flash() returned FSUCCESS
ram_data[0] = 0x6789
ram_data[1] = 0xBCDE
ram_data[2] = 0x9ABC
ram_data[3] = 0x0000
ram_data[4] = 0xFFFF

Note that my device is an 'MU810' not an 'MU806.  These devices have been around a long time, and I don't remember ever seeing errata about timing of Program Flash Memory reading or writing.  I concede that it is possible that the '806 has different characteristics at highest frequencies but I note that 70 MHz is still (barely) within specified operating parameters for -40  to +85C



[Edit]
I think there is work to be done to make your program practical, but I am not at all sure that it depends on clock frequency.
 
Regards,

Dave
post edited by davekw7x - 2019/07/07 17:59:24

Sometimes I just can't help myself...
#8
noobita
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Re: dsPIC33EP NVM (Flash) @ 64MHz Problem 2019/07/07 16:41:43 (permalink)
0
**See next post**
 
Wasn't being able to edit the full post, sorry.
post edited by noobita - 2019/07/07 17:01:30
#9
noobita
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Re: dsPIC33EP NVM (Flash) @ 64MHz Problem 2019/07/07 16:59:39 (permalink)
0
davekw7x
 
First of all, when you said it didn't work for a frequency of 64 MHz it wasn't clear whether you meant system clock of 64 MHz or instruction frequency of 64 MHz.
To take it to the extreme, I tested your code at 70 MIPS (system clock of 140 MHz).  I verified FCY = 70000000 by toggling an LED in a loop controlled by __delay_ms(1000) and visually verified a one second toggle interval.
Main points of my test:
I used your (unmodified) flash read and write functions.
I added a couple of definitions to make it compile, and a useful function to interpret the value returned from them.
Note that programming may reset the device and start it running one or more times, so when testing, I always make sure it doesn't start writing to Flash before it is ready.  I use a pushbutton switch to make it wait.  If my board didn't have a convenient input for such a thing, I would simply put in a delay of a couple of seconds.
I never depend on a debugger or anything else for testing this kind of stuff.  I used a UART and printf to show the results.

// DSPIC33EP512MU810 Configuration Bit Settings
// 'C' source line config statements
// FGS
#pragma config GWRP = OFF               // General Segment Write-Protect bit (General Segment may be written)
#pragma config GSS = OFF                // General Segment Code-Protect bit (General Segment Code protect is disabled)
#pragma config GSSK = OFF               // General Segment Key bits (General Segment Write Protection and Code Protection is Disabled)
// FOSCSEL
#pragma config FNOSC = FRC              // Initial Oscillator Source Selection Bits (Internal Fast RC (FRC))
#pragma config IESO = ON                // Two-speed Oscillator Start-up Enable bit (Start up device with FRC, then switch to user-selected oscillator source)
// FOSC
#pragma config POSCMD = HS              // Primary Oscillator Mode Select bits (HS Crystal Oscillator Mode)
#pragma config OSCIOFNC = OFF           // OSC2 Pin Function bit (OSC2 is clock output)
#pragma config IOL1WAY = OFF            // Peripheral pin select configuration (Allow multiple reconfigurations)
#pragma config FCKSM = CSECME           // Clock Switching Mode bits (Both Clock switching and Fail-safe Clock Monitor are enabled)
// FWDT
#pragma config WDTPOST = PS32768        // Watchdog Timer Postscaler Bits (1:32,768)
#pragma config WDTPRE = PR128           // Watchdog Timer Prescaler bit (1:128)
#pragma config PLLKEN = ON              // PLL Lock Wait Enable bit (Clock switch to PLL source will wait until the PLL lock signal is valid.)
#pragma config WINDIS = OFF             // Watchdog Timer Window Enable bit (Watchdog Timer in Non-Window mode)
#pragma config FWDTEN = OFF             // Watchdog Timer Enable bit (Watchdog timer enabled/disabled by user software)
// FPOR
#pragma config FPWRT = PWR128           // Power-on Reset Timer Value Select bits (128ms)
#pragma config BOREN = ON               // Brown-out Reset (BOR) Detection Enable bit (BOR is enabled)
#pragma config ALTI2C1 = OFF            // Alternate I2C pins for I2C1 (SDA1/SCK1 pins are selected as the I/O pins for I2C1)
#pragma config ALTI2C2 = OFF            // Alternate I2C pins for I2C2 (SDA2/SCK2 pins are selected as the I/O pins for I2C2)
// FICD
#pragma config ICS = PGD1               // ICD Communication Channel Select bits (Communicate on PGEC1 and PGED1)
#pragma config RSTPRI = PF              // Reset Target Vector Select bit (Device will obtain reset instruction from Primary flash)
#pragma config JTAGEN = OFF             // JTAG Enable bit (JTAG is disabled)
// FAS
#pragma config AWRP = OFF               // Auxiliary Segment Write-protect bit (Auxiliary program memory is not write-protected)
#pragma config APL = OFF                // Auxiliary Segment Code-protect bit (Aux Flash Code protect is disabled)
#pragma config APLK = OFF               // Auxiliary Segment Key bits (Aux Flash Write Protection and Code Protection is Disabled)
// #pragma config statements should precede project file includes.
// Use project enums instead of #define for ON and OFF.
#include <xc.h>
#include <stdio.h>
#include <stdlib.h>
/*
 * dsPIC33 USB Starter Kit
 * LEDs on RD0, RD1, RD2
 * Switches on RD6, RD7, RD13
 *
 * 8 MHz crystal
 *
 * My UART Connections:
 *
 * U1 at 115200 Baud
 *    Tx on RF5
 *    Rx on RF4
 */
#ifdef __dsPIC33EP512MU810__
#define CPU "dsPIC33EP512MU810"
#else
#define CPU "???"
#endif
#define MIPS 70
#define FCY (MIPS*1000000UL)
#include <libpic30.h>
// Definitions for LED and SW functionality go here
// From davekw7x: Just for kicks, I initialized the first four words.
const uint16_t __attribute__((space(prog), aligned(_FLASH_PAGE * 2)))
dat[_FLASH_PAGE] = {
    //0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
    0x1234, 0x5678, 0x9ABC, 0x0000, 0xFFFF, 0xFFFF, 0xFFFF,
    0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
    // For purposes of testing, I left out the remaining initializer
    // list.  They will all be set to zeros, but I don't look at them here.
};
// Zero meahs it's good.  Negative value for error
typedef enum {
    FNULL_PTR = -2,
    FOUT_OF_BOUNDS, //-1
    FSUCCESS        // 0
} FlashError;
// Make it easy to see what the return value means by returning
// a pointer to a string literal.
//
const char * decode_FlashError(FlashError err)
{
    switch (err) {
    case FNULL_PTR:
        return "FNULL_PTR";
        break;
    case FOUT_OF_BOUNDS:
        return "FOUT_OF_BOUNDS";
        break;
    case FSUCCESS:
        return "FSUCCESS";
        break;
    default:
        return "???";
        break;
    } // End switch
} // End of print_FlashError
void init_system(void);
FlashError read_flash(uint16_t *buffer, unsigned offset, unsigned len);
FlashError write_flash(uint16_t *buffer, unsigned offset, unsigned len);
int main()
{
    // Save an entire page of 1024 words to allow preservation
    // of data that you want to preserve.
    //
    uint16_t ram_data[_FLASH_PAGE];
    // Initialize clock, I/O, UART, etc...
    init_system();
    printf("\r\nCompiled on %s at %s by XC16 version %u\r\n",
            __DATE__, __TIME__, __XC16_VERSION);
    printf("CPU is %s running at %u MIPS\r\n", CPU, MIPS);
    FlashError retval;
    const char *error_str;
    // Will read five words for this test
    unsigned len = 5;
    retval = read_flash(ram_data, 0, len);
    error_str = decode_FlashError(retval);
    printf("read_flash() returned %s\r\n", error_str);
    printf("Initially\r\n");
    int i;
    for (i = 0; i < 5; i++) {
        printf("ram_data[%u] = 0x%04X\r\n", i, ram_data[i]);
    }
    printf("\r\n");
    printf("Press SW1 to begin erase/write test: ");
    while (!SW1_ISPRESSED())
        ;
    printf("\r\n\r\n");
    ram_data[0] += 0x5555;
    ram_data[1] += 0x6666;
    printf("Writing 0x%04X 0x%04X to the first two words\r\n",
            ram_data[0], ram_data[1]);
    retval = write_flash(ram_data, 0, 2);
    error_str = decode_FlashError(retval);
    printf("write_flash() returned %s\r\n", error_str);
        for (i = 0; i < 5; i++) {
        printf("ram_data[%u] = 0x%04X\r\n", i, ram_data[i]);
    }
    printf("\r\n");
    // Observe 1 second toggle interval to verify that FCY is really what
    // we intended.
    while (1) { // main loop
        LED2 = SW1;
        LED1_Toggle();
        __delay_ms(1000);
    } // End of main loop
} // End of main();

Output
Compiled on Jul  7 2019 at 15:48:04 by XC16 version 1036
CPU is dsPIC33EP512MU810 running at 70 MIPS
read_flash() returned FSUCCESS
Initially
ram_data[0] = 0x1234
ram_data[1] = 0x5678
ram_data[2] = 0x9ABC
ram_data[3] = 0x0000
ram_data[4] = 0xFFFF
Press SW1 to begin erase/write test:
Writing 0x6789 0xBCDE to the first two words
write_flash() returned FSUCCESS
ram_data[0] = 0x6789
ram_data[1] = 0xBCDE
ram_data[2] = 0x9ABC
ram_data[3] = 0x0000
ram_data[4] = 0xFFFF
Note that my device is an 'MU810' not an 'MU806.  These devices have been around a long time, and I don't remember ever seeing errata about timing of Program Flash Memory reading or writing.  I concede that it is possible that the '806 has different characteristics at highest frequencies but I note that 70 MHz is still (barely) within specified operating parameters for -40  to +85C
Regards,
Dave


Thanks for your reply and for your test. Just to clarify, when i say 64 MHz clock frequency i'm talking about FCY, which translates to 64 MIPS.
Relative to the restof the code, i will give it a look and get back soon.
Best regards
 
EDIT

Relatively to your initial pragmas. In my program (the complete one) i use almost the same pragmas, only difference is:

#pragma config IESO = OFF
#pragma config FWDTEN = ON
#pragma config FCKSM = CSECMD
#pragma config FPWRT = PWR4
#pragma config ICS = NONE

To write/read to/from flash i do:
[code]
uint16_t volatile params[8];
//write to flash
write_flash(params+id, 0, 1);
//read from flash
read_flash(params+4, 0, 4);
[code]
 
Again, at 16 MIPS the code works correctly, no problema at all. At 64 MIPS can't write to memory. I know in your application this has worked properly. Do you think it has to do with the diferente pragmas (don't know how, but is the only difference i can find)?
 
Best regards
#10
ric
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Re: dsPIC33EP NVM (Flash) @ 64MHz Problem 2019/07/07 17:10:48 (permalink)
4 (1)
Try inserting a delay between the calls to write_flash() and read_flash().
Note that Dave's code doesn't try to read it back immediately.
 

I also post at: PicForum
Links to useful PIC information: http://picforum.ric323.co...opic.php?f=59&t=15
NEW USERS: Posting images, links and code - workaround for restrictions.
To get a useful answer, always state which PIC you are using!
#11
davekw7x
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Re: dsPIC33EP NVM (Flash) @ 64MHz Problem 2019/07/07 17:18:12 (permalink)
0
Well, my face is red!  My code (using sequence from FRM) works at all speeds.  I had made major mistake in using yhour code in the test program, and it turns out that the writes do not work much above 40 MIPS.  I'll investigate further and let you know.

Sorry about the misinformation.
 
Regards,

Dave
post edited by davekw7x - 2019/07/07 17:20:52

Sometimes I just can't help myself...
#12
noobita
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Re: dsPIC33EP NVM (Flash) @ 64MHz Problem 2019/07/07 17:22:13 (permalink)
0
ric
Try inserting a delay between the calls to write_flash() and read_flash().
Note that Dave's code doesn't try to read it back immediately.
 




I don't do sequential calls to the functions. Was just to show how i implement the reads and writes in my code (variable where i store the reads and what is the data used for the write).
 
davekw7x
Well, my face is red!  My code (using sequence from FRM) works at all speeds.  I had made major mistake in using yhour code in the test program, and it turns out that the writes do not above 32 MIPS.  I'll investigate further and let you know.

Sorry about the misinformation.
 
Regards,

Dave



So your program wasn't tested at 70 MIPS? I will be waiting to hear from you. Thanks for your help. 
 
Other non related question to this, when i try to post in the fórum i'm always getting disconnected from my account and i get a denied access because of that. Is that normal?
 
Best regards
 
EDIT
 
Further information that may be useful. My application is compiled using the -O1 flag (already tested using -O0 flag but error doesn't come from there). 
@ric, NVM/Flash read is only done in the initialization of the program (one time) and writes are done when a message is recieved via CAN to do it (no problem there also - recieving correct data). When Disconnect and reconnect the MCU, the read has the default value (65535).
 
Best regards
post edited by noobita - 2019/07/07 17:34:26
#13
davekw7x
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Re: dsPIC33EP NVM (Flash) @ 64MHz Problem 2019/07/07 17:51:07 (permalink) ☼ Best Answerby noobita 2019/07/08 06:51:30
5 (1)
noobita
ric
Note that Dave's code doesn't try to read it back immediately




Yes.  That was a major bug that resulted from a too-hasty copy/paste from my code.  Correct sequence for testing:
 
Write it.
Read it back.
Then print it!
 
The real problem that I didn't notice in your code is the following, in flash_write:
    _erase_flash(p);
    _write_flash16(p, tmp);

The erase function does not wait for it to be erased.  Here's the fix:
    _erase_flash(p);
    while(NVMCONbits.WR)
        ;
    _write_flash16(p, tmp);

This works at optimization level 1 and 70 MIPS
 
Note that the CPU stalls for the _write_flash function but not for the _erase_flash.  That explains the failure at high clock speeds and explains the difference between higher and lower optimization settings.
 
With this fix (and with the correction in the test sequence), I verified that it works at 70 MIPS.  When I power-cycle or perform a reset, it starts with the previous values in the array (that's kind of the point of putting things in Flash Memory, right?).  The const array is initialized in the hex file, not in the application code.
 
Bottom line: I knew from my original test, that it works at 70 MHz, and I really screwed the pooch when cobbling up a test for your code.
 
Regards,
 
Dave
 
 
post edited by davekw7x - 2019/07/07 18:09:19

Sometimes I just can't help myself...
#14
davekw7x
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Re: dsPIC33EP NVM (Flash) @ 64MHz Problem 2019/07/07 18:04:01 (permalink)
4 (1)
ric
Try inserting a delay between the calls to write_flash() and read_flash().

Actually, the CPU stalls until programming is finished, so that's not the problem.  The real bug is that erase_flash does not stall, and you should wait until the WR bit is clear after an erase operation before writing again.
ric
Note that Dave's code doesn't try to read it back immediately.

Thanks for pointing that out.
Really dumb test sequence.  Didn't actually test that the write resulted in new values. Not my finest effort.
Oh, well..
 
Regards,

Dave
post edited by davekw7x - 2019/07/08 06:28:53

Sometimes I just can't help myself...
#15
du00000001
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Re: dsPIC33EP NVM (Flash) @ 64MHz Problem 2019/07/08 00:07:51 (permalink)
0
noobita
... I'm always getting disconnected ...

This depends on your browser's settings (provided you hook the "keep me logged in" during login): the access status is memorized by means osome cookie(s): deleting the cookies effects a logoff.

PEBKAC / EBKAC / POBCAK / PICNIC (eventually see en.wikipedia.org)
#16
noobita
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Re: dsPIC33EP NVM (Flash) @ 64MHz Problem 2019/07/08 06:52:15 (permalink)
0
davekw7x
noobita
ric
Note that Dave's code doesn't try to read it back immediately




Yes.  That was a major bug that resulted from a too-hasty copy/paste from my code.  Correct sequence for testing:
 
Write it.
Read it back.
Then print it!
 
The real problem that I didn't notice in your code is the following, in flash_write:
    _erase_flash(p);
    _write_flash16(p, tmp);

The erase function does not wait for it to be erased.  Here's the fix:
    _erase_flash(p);
    while(NVMCONbits.WR)
        ;
    _write_flash16(p, tmp);

This works at optimization level 1 and 70 MIPS
 
Note that the CPU stalls for the _write_flash function but not for the _erase_flash.  That explains the failure at high clock speeds and explains the difference between higher and lower optimization settings.
 
With this fix (and with the correction in the test sequence), I verified that it works at 70 MIPS.  When I power-cycle or perform a reset, it starts with the previous values in the array (that's kind of the point of putting things in Flash Memory, right?).  The const array is initialized in the hex file, not in the application code.
 
Bottom line: I knew from my original test, that it works at 70 MHz, and I really screwed the pooch when cobbling up a test for your code.
 
Regards,
 
Dave
 
 




Yup, that was the problem. Your solution solved it. Didn't know that _erase_flash wasn't blocking (waited for flash to erase).
 
Best regards
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