Re: 16F15324 Reference Clock Output Module frequency limit?
The limit should be dictated by the PORT rise/fall time.
At least, in all the other pics where i've tested the REFO module, it would be happy to generate any possible frequency from any available clock source. Only the waveform would be degraded at frequencies higher than the maximum system clock because of port rise/fall time, but nothing like your second screenshot.
More informations will give more detailed answers