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Answered16F15324 Reference Clock Output Module frequency limit?

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currenthunter
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2019/04/06 10:05:58 (permalink)
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16F15324 Reference Clock Output Module frequency limit?

Hi,
Is there any frequency limit in case of Reference Clock Output Module? If yes why the datasheet doesn't mention it? I thought what a good possibility to use the NCO and CLKR to generate clock output, but it is totally unusable above some MHz. It gives very distordet signal. The input clock is stable 32MHz sine wave. Can I do something to generate correct siganal or shoud I drop the complete project to trash?

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JPortici
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Re: 16F15324 Reference Clock Output Module frequency limit? 2019/04/06 10:38:37 (permalink)
+1 (1)
The limit should be dictated by the PORT rise/fall time.
At least, in all the other pics where i've tested the REFO module, it would be happy to generate any possible frequency from any available clock source. Only the waveform would be degraded at frequencies higher than the maximum system clock because of port rise/fall time, but nothing like your second screenshot.
 
More informations will give more detailed answers
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davekw7x
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Re: 16F15324 Reference Clock Output Module frequency limit? 2019/04/06 11:49:53 (permalink) ☼ Best Answerby currenthunter 2019/04/06 12:56:12
+3 (3)
currenthunter
...Can I do something...

 
You can look for referencse to "Slew Rate Control" in the I/O section of the data sheet.
 
Bottom line: Upon power-up, all output bits are set with Slew Rate limited.  For the '324, clear the appropriate bit of SLRCONA or SLRCONC to get fastest possible output slew.  10 MHz Reference Clock output is very possible (assuming you don't have much of an external load on the pin).
 
If this doesn't help, don't trash the project just yet; tell us exactly what pin you are observing.  Better yet, post a small complete project that shows the problem.  Maybe someone can help you get to the bottom of things.\
 
Regards,

Dave
post edited by davekw7x - 2019/04/06 11:58:18

Sometimes I just can't help myself...
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currenthunter
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Re: 16F15324 Reference Clock Output Module frequency limit? 2019/04/06 13:02:41 (permalink)
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Thanks Dave, the slew rate limit was the problem... these new devices packed with all goodies what I can imagine, but sometimes too much for me :)
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