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Hot!Problem with PIC24FJ256GB108 and EZBL

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ajlikesPIC
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2019/04/01 16:13:02 (permalink)
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Problem with PIC24FJ256GB108 and EZBL

Hello,
 
Using the UART EZBL hardware initializer for PIC24FJ256GB110, I was able to successfully do a firmware upgrade on my target board. I tweaked the baud rate to 115200 and used UART 1 instead. I was able to make this work using the default config bits setting in the hardware initializer as shown below.
    EZBL_SET_CONF(_CONFIG3, WPDIS_WPDIS & WPCFG_WPCFGDIS)  // Nothing Write Protected
    EZBL_SET_CONF(_CONFIG2, POSCMOD_XT & DISUVREG_OFF & IOL1WAY_OFF & OSCIOFNC_ON & FCKSM_CSECME & FNOSC_FRC & PLL_96MHZ_ON & PLLDIV_DIV2 & IESO_OFF)
    EZBL_SET_CONF(_CONFIG1, WINDIS_OFF & FWDTEN_OFF & ICS_PGx2 & GWRP_OFF & GCP_OFF & JTAGEN_OFF) // Code Protect = OFF, Write Protect = OFF
 
And here are few things I tweaked
const long EZBL_COMBaud = 115200;        
#if defined(XPRJ_uart)  // Defined by MPLAB X on command line when compiling "uart" Build Configuration
   
    RPINR18bits.U1RXR = 12;   //U1RX = RP12 --> RADIO DE-9 RS-232 port
    RPOR5bits.RP11R = 3;  //RP11 = U1TX --> RADIO DE-9 RS-232 port
    #define BRATE       34//115,200 baud, 32MHz XTAL
    #define U_ENABLE    0x8808
    #define U_TX        0x0400

    U1BRG = BRATE;
    U1MODE = U_ENABLE;
    U1STA = U_TX;
   
    if(EZBL_COMBaud <= 0)       // If auto-baud enabled, delay our UART initialization so MCP2221A POR timer and init
    {                           // is complete before we start listening. POR timer max spec is 140ms, so MCP2221A TX
        NOW_Wait(140u*NOW_ms);  // pin glitching could occur long after we have enabled our UART without this forced delay.
    }
    EZBL_COMBootIF = UART_Reset(1, FCY, EZBL_COMBaud, 1);
#endif
Everything above works fine. 
Here is the problem. When I changed the config bits to match what we are using in the actual application. I get an error in the firmware upgrade. Unfortunately, the engineer who designed the product wants to keep the config bits as shown below. 
 
    EZBL_SET_CONF(_CONFIG3, WPDIS_WPDIS & WPCFG_WPCFGDIS)  // Nothing Write Protected
    EZBL_SET_CONF(_CONFIG2, POSCMOD_EC & IOL1WAY_OFF & OSCIOFNC_ON & FCKSM_CSDCMD & FNOSC_PRIPLL & PLL_96MHZ_ON & PLLDIV_DIV2 & IESO_OFF)
    EZBL_SET_CONF(_CONFIG1, FWDTEN_ON & ICS_PGx1 & GWRP_OFF & GCP_OFF & JTAGEN_OFF & WDTPS_PS8192 & FWPSA_PR128) // Code Protect = OFF, Write Protect = OFF
 
 
I always get the error below.

Upload progress: |0%         25%         50%         75%        100%|
                 |..................................................|
                 17239 bytes sent in 3.944s (4371 bytes/second)
Bootloader read-back verification failure
 
Is there anything that could be done to solve the issue?
 
Thanks.
 
Regards,
AJ 
 
 
#1

4 Replies Related Threads

    kparrent
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    Re: Problem with PIC24FJ256GB108 and EZBL 2019/08/02 11:48:21 (permalink)
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    Did you ever resolve this issue? I am seeing this with the current default builds of the sample projects. I was able to get it to go to a "soft" error by reverting to EZBL v2.04 but that is not a long term solution.
    #2
    Stampede
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    Re: Problem with PIC24FJ256GB108 and EZBL 2019/08/05 03:22:38 (permalink)
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    These kind of errors usually occur, when the reads back a value different from the origial BLOB file. This is the case, if you have for example a different bootloader (version/build) running in your system than in the BLOB. Also make sure that you NOT use a debug build when building the bootloader part of the project.
    #3
    kparrent
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    Re: Problem with PIC24FJ256GB108 and EZBL 2019/08/05 07:10:55 (permalink)
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    Hi Stampede,
     
    Thank you for the response. I'm new to the MPLAB IDE so I'll make sure that I'm not using the Debug build. There are no other bootloaders that could be on here (brand new hardware and have only used EZBL projects) unless it ships with one on it.
     
    I did find that if I comment out the line which sets the _FSEC bits this problem goes away. I have not isolated this down to a single parameter yet. Does that provide any further clues as to what the issue is?
     
    EZBL_SET_CONF(_FSEC, BWRP_OFF & BSS_OFF & BSEN_OFF & GWRP_OFF & GSS_OFF & CWRP_OFF & CSS_DIS & AIVTDIS_DISABLE)
     
    Thanks!
    Kris
    #4
    wts
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    Re: Problem with PIC24FJ256GB108 and EZBL 2019/09/05 11:39:01 (permalink)
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    Just FYI
    I had the same error using the PIC24FJ1024GB610  (dual partition)
     
    Upload progress: |0%         25%         50%         75%        100%|
                     |..................................................|
                     10564 bytes sent in 1.348s (7835 bytes/second)

    Bootloader read-back verification failure
     
    It was because of selecting "Single"
    in XC16 (Global Options) Partition window.
    Selecting "Partition One/Active" fixed it.
     
    I was able to repeat the error by changing the settings back to "Single"
    In "dual" mode it says the boot loader can be erased, so I chose "single" to prevent that issue.
     
    Regards
    #5
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