The final word has come from Microchip today: Created By: Matthew Robertson (3/21/2019 1:47 PM)
I'll pass your comments off to my colleague and see what he says, but in the meantime, I have received clarification on the issue.
Here is the most recent issue description.
"When using byte mode instructions with modified indirect addressing and the same source and destination register, the data write back will have priority over the address write back.
For example, any instruction using the format "xxx.b [Wy++], Wy" would exhibit this behavior. The actual byte mode instruction used does not matter.
It is recommended that when using byte mode instructions with modified indirect addressing, avoid using the same source and destination address."
Regarding which devices are affected, all dsPIC/PIC24 will block the modified indirect address update. The newer CH/CK devices will block any data write back from overflowing into the upper byte.
To be clear, we believe there is no valid usage model for mixing a 16 bit address and byte data in the same working register. In addition, our C compiler does not generate code that would be affected by this issue.
None of the code examples you provided would be affected. As long as you verify that the above condition does not occur somewhere else in your code, you should be good. I apologize for the confusion over this issue.
If you have further questions, just let me know, and I will get back to you as soon as I can. Otherwise, if you no longer need further engagement, feel free to close the case.
Matthew So the good news is that this is the complete description of the issue, which should have been included in the errata in the first place. This issue will never affect me, or likely anyone else. I can happily continue on to production!