In PIC32 microcontrollers, I/O pin registers, may be read and written just like memory.
The memory address of each SFR register is specified in the Datasheet for the device.
Then, in PIC32 devices, most SFR registers, including all I/O pin control registers,
have hardware gating registers, addressed by the next 3 longword memory addresses,
to perform bitwise logical operations with existing register content.
LATFSET = _LATF_LATF12_MASK; /* Will do: LATF = LATF | __MASK; in hardware */
Similar there are LATFCLR and LATFINV registers.
In PIC32MZ device, address of LATF register is 0xBF860530, with LATFSET register at 0xBF860538
Here is example code for PIC32MZ2048EFG100 on a Wi-Fire board:
/* Light a LED, this is LD4 on a Wi-Fire board. */
uint32_t *pointer; /* Pointer to memory or SFR register. */
pointer = 0xBF860638; /* Address of LATGSET register */
*pointer = 0x08000; /* Set a single bit */
pointer = 0xBF860614; /* Address of TRISGCLR register */
*pointer = 0x08000; /* Clear a single bit */
Register addresses are also revealed by device support header file, and by Watch window in MPLAB X debugger.