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Helpful ReplyHot!HOW TO: PIC32MZ USB without Harmony

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MisterHemi
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Re: HOW TO: PIC32MZ USB without Harmony 2020/05/07 17:00:40 (permalink)
0
kalunga
Hi everybody.
 
I have here a Curiosity PIC32MZ EF board, and I was trying to use it for my personal projects. One problem I had was with the USB, because I always thought that Harmony was too dificult to handle... So, searching for an alternative, I've found this thread, and I have to thank the author for all the efforts.
At first, I have also the problem as willysjeeps: "Unknown USB Device (Device Descriptor Request Failed)". So I decided to investigate what was happening. While doing this, I've found also some issues that I have to ask if they are meant to be so, or not.
 
Well, first things first. The problem of failed descriptor was caused by a mismatch between the bMaxPacketSize0 field in the Device Descriptor (you set it to 8) and the EP0 buffer size that you defined, as the code has:

 
/* USB related values */
#define EP0BUFFSIZE 8 // In multiples of 8, e.g.- 8 (x8) equals a size of 64
#define EP1TXBUFFSIZE 2 // Also in multiples of 8, e.g.- 1 (x8) equals a size of 8
#define EP2TXBUFFSIZE 8 // Also in multiples of 8, e.g.- 8 (x8) equals a size of 64
#define EP3RXBUFFSIZE 8 // Also in multiples of 8, e.g.- 8 (x8) equals a size of 64
#define EP0_MAX_PACKET_SIZE (EP0BUFFSIZE * 8)
#define EP1_MAX_PACKET_SIZE (EP1TXBUFFSIZE * 8)
#define EP2_MAX_PACKET_SIZE (EP2TXBUFFSIZE * 8)
#define EP3_MAX_PACKET_SIZE (EP3RXBUFFSIZE * 8)
#define VBUS_VALID 0x3
 

 
I Just defined bMaxPacketSize0 as 64 (as the Basic example you wrote has) or defined EP0BUFFSIZE as 1, and my device is numerated correctly.
 
Found other points that I have to ask. For example, in the basic example, you re-enable the EP0 interrupt inside the USB reset interrupt, along with other Endpoint interrupts. But in the CDC example, you aren't doing this... It is not necessary?
The case 0x8006 inside controlTrans function doesn't have a break statement at its end, making the next case (case 0x810A) being also executed...
Finally, in some cases, you have, for example, written:

 
ep0BlockData = &usbConfiguration;
txBlock_ep0(sizeof(ep0BlockData));
 

But, doing this way, aren't you taking the pointer size rather than the structure size? The correct wouldn't be:

 
ep0BlockData = &usbConfiguration;
txBlock_ep0(sizeof(usbConfiguration));
 

 
Thank you again, and I hope that what I wrote here can help to make this project better.
 




Thank for the feedback, I do appreciate it.
 
1) You are correct the bMaxPacketSize0 should be 64 for a high speed device. So that was an error or oversight on my part.
 
2) Regarding the reset interrupt, I later decided against reseting everything. I had read that Windows does or used to send a reset to make sure everything was at it's default state. However I don't know if that's necessary or still true. I've noticed no difference on my MacBook Pro but I should open Windows 10 (via VMWare) and verify this.
I had a similar situation with using dynamic FIFOs versus defining them, it didn't seem to make a difference.
 
3) In regards to pointer size versus structure size you might be correct but I would think they should be of equal size. I don't think there are any extra characters, such as a terminating character, like you'd find in a text string that might not be evaluated. I hope that make sense.
 
I occasionally make improvements when I see things. i'm considering making a drop in USB_CDC_ACM project that people can add to their project. They would just need to edit and add a few things.
 
I'm glad it has been useful for you. I'll have to post a note regarding the Unknown USB Device (Device Descriptor Request Failed) issue so people can change the bMaxPacketSize0 to 64. Thank you!

My configuration:
MacBook Pro (Retina, 15-inch, Mid 2015) with MacOS Mojave (10.14.6) and MPLAB X IDE v5.30
 
Curiosity PIC32MZ EF 1 & 2, PIC24F Curiosity, XPRESS EVAL BOARD (PIC16F18855), SAMA5D3 Xplained and various custom boards.
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MisterHemi
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Re: HOW TO: PIC32MZ USB without Harmony 2020/05/07 17:18:37 (permalink)
0
willysjeeps
Francesco /Timmons mentioned a wMaxPacketSize of 7 but I don't see here that is (that's a couple pages back).  Unfortunately he never posted his fixes.




Just quoting you to get your attention. Someone answered your question, in about 2 post prior to this one.

My configuration:
MacBook Pro (Retina, 15-inch, Mid 2015) with MacOS Mojave (10.14.6) and MPLAB X IDE v5.30
 
Curiosity PIC32MZ EF 1 & 2, PIC24F Curiosity, XPRESS EVAL BOARD (PIC16F18855), SAMA5D3 Xplained and various custom boards.
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kalunga
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Re: HOW TO: PIC32MZ USB without Harmony 2020/05/08 10:30:13 (permalink)
0
MisterHemi
2) Regarding the reset interrupt, I later decided against reseting everything. I had read that Windows does or used to send a reset to make sure everything was at it's default state. However I don't know if that's necessary or still true. I've noticed no difference on my MacBook Pro but I should open Windows 10 (via VMWare) and verify this.
I had a similar situation with using dynamic FIFOs versus defining them, it didn't seem to make a difference.

I checked with my debugger, and Windows actually send the reset.
 
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MisterHemi
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Re: HOW TO: PIC32MZ USB without Harmony 2020/05/08 11:41:23 (permalink)
0
kalunga
MisterHemi
2) Regarding the reset interrupt, I later decided against reseting everything. I had read that Windows does or used to send a reset to make sure everything was at it's default state. However I don't know if that's necessary or still true. I've noticed no difference on my MacBook Pro but I should open Windows 10 (via VMWare) and verify this.
I had a similar situation with using dynamic FIFOs versus defining them, it didn't seem to make a difference.

I checked with my debugger, and Windows actually send the reset.
 




 
Good to know.... so I think the reset ISR should reset most of the registers maybe with the exception of the address (FUNC) .
 
I do wonder though if that's really necessary.... as far as I know it's not something required by the USB specifications.
 
In some code I have I altered the USB initialization, as shown here:

void initUSB(uint8_t initialStateUSB){
// Initialize USB hardware
if(initialStateUSB == 0){
USBCSR0bits.SOFTCONN = 0; // 1 = The USB D+/D- lines are enabled and active,
// 0 = The USB D+/D- lines are disabled and are tri-stated.
}

USBCSR0bits.HSEN = 1; // 1 = Enable High Speed (480Mbps) USB mode.

/* Disable Endpoint interrupts */
USBCSR1bits.EP0IE = 0; // Endpoint 0 interrupt disable
USBCSR1bits.EP1TXIE = 0; // Endpoint 1 TX interrupt disable
USBCSR2bits.EP2RXIE = 0; // Endpoint 2 RX interrupt disable
USBCSR2bits.EP3RXIE = 0; // Endpoint 3 RX interrupt disable
USBCSR1bits.EP4TXIE = 0; // Endpoint 4 TX interrupt disable
USBCSR2bits.EP5RXIE = 0; // Endpoint 5 RX interrupt disable
USBCSR1bits.EP6TXIE = 0; // Endpoint 6 TX interrupt disable

USBCSR2bits.EP7RXIE = 0; // Endpoint 7 RX interrupt disable
USBCSR1bits.EP7TXIE = 0; // Endpoint 7 TX interrupt disable

USBCSR2bits.SOFIE = 0; // Disable Start of Frame event interrupt.

USBCSR2bits.RESETIE = 0;

USBCRCONbits.USBIE = 0; // Disable general interrupt from USB module
IEC4bits.USBIE = 0; // Disable the USB interrupt.

IEC4bits.USBDMAIE = 0; // Disable USB DMA interrupt.

// Clear the interrupt flags
IFS4CLR = _IFS4_USB_GENERAL_EVENT_MASK;
USBCSR0bits.EP0IF = 0;
USBCSR0bits.EP1TXIF = 0;
USBCSR1bits.EP2RXIF = 0;
USBCSR1bits.EP3RXIF = 0;
USBCSR0bits.EP4TXIF = 0;
USBCSR1bits.EP5RXIF = 0;
USBCSR0bits.EP6TXIF = 0;

USBCSR1bits.EP7RXIF = 0;
USBCSR0bits.EP7TXIF = 0;

USBDMAINTbits.DMA1IF = 0;
USBDMAINTbits.DMA2IF = 0;
USBDMAINTbits.DMA3IF = 0;
USBDMAINTbits.DMA4IF = 0;

USBCSR2bits.SOFIF = 0;

IPC33bits.USBIP = 6; // USB Interrupt Priority.
IPC33bits.USBIS = 3; // USB Interrupt Sub-Priority.

if(initialStateUSB == 0){
USBCSR0bits.FUNC = 0; // Initially set the USB address to 0 until
} // later when the host assigns an address

// MODE: Endpoint Direction Control bit
// 1 = Endpoint is TX
// 0 = Endpoint is RX
USBE1CSR0bits.MODE = 1; // 1 = Endpoint is TX.
USBE2CSR0bits.MODE = 0; // 0 = Endpoint is RX
USBE3CSR0bits.MODE = 0; // 0 = Endpoint is RX.
USBE4CSR0bits.MODE = 1; // 1 = Endpoint is TX
USBE5CSR0bits.MODE = 0; // 0 = Endpoint is RX
USBE6CSR0bits.MODE = 1; // 1 = Endpoint is TX

USBE7CSR0bits.MODE = 0; //

// Configure endpoint 0 first.
USBE0CSR0bits.TXMAXP = EP0BUFFSIZE; // Set endpoint 0 buffer size (multiples of 8).

// These are multiples of 8, e.g.- "1" is 8 bytes, "8" is 64 bytes
USBE1CSR0bits.TXMAXP = EP1TXBUFFSIZE; // Endpoint 1 - Maximum TX Payload Per Transaction Control bits
USBE2CSR1bits.RXMAXP = EP2RXBUFFSIZE; // Endpoint 2 - Maximum RX Payload per transaction Control bits
USBE3CSR1bits.RXMAXP = EP3RXBUFFSIZE; // Endpoint 3 - Maximum RX Payload Per Transaction Control bits
USBE4CSR0bits.TXMAXP = EP4TXBUFFSIZE; // Endpoint 4 - Maximum TX Payload per transaction Control bits
USBE5CSR1bits.RXMAXP = EP5RXBUFFSIZE; // Endpoint 5 - Maximum RX Payload per transaction Control bits
USBE6CSR0bits.TXMAXP = EP6TXBUFFSIZE; // Endpoint 6 - Maximum TX Payload per transaction Control bits

USBE7CSR1bits.RXMAXP = EP7RXBUFFSIZE; // Endpoint 7 - Maximum RX Payload per transaction Control bits
USBE7CSR0bits.TXMAXP = EP7TXBUFFSIZE; // Endpoint 7 - Maximum TX Payload per transaction Control bits

USBE1CSR2bits.PROTOCOL = 1; // Endpoint 1 - TX Endpoint Protocol Control bits
USBE2CSR3bits.PROTOCOL = 1; // Endpoint 2 - RX Endpoint Protocol Control bits
USBE3CSR3bits.PROTOCOL = 1; // Endpoint 3 - RX Endpoint Protocol Control bits
USBE4CSR2bits.PROTOCOL = 1; // Endpoint 4 - TX Endpoint Protocol Control bits
USBE5CSR3bits.PROTOCOL = 2; // Endpoint 5 - RX Endpoint Protocol Control bits
USBE6CSR2bits.PROTOCOL = 2; // Endpoint 6 - TX Endpoint Protocol Control bits

USBE7CSR3bits.PROTOCOL = 2; // Endpoint 7 - RX Endpoint Protocol Control bits
USBE7CSR2bits.PROTOCOL = 2; // Endpoint 7 - TX Endpoint Protocol Control bits
//PROTOCOL<1:0>: RX/TX Endpoint Protocol Control bits
//11 = Interrupt
//10 = Bulk
//01 = Isochronous
//00 = Control

// ISOUPD: ISO Update bit (Device mode only; unimplemented in Host mode)
// 1 = USB module will wait for a SOF token from the time TXPKTRDY is set
// before sending the packet.
// 0 = No change in behavior.
USBCSR0bits.ISOUPD = 0; // 1

#define DynamicFIFO

#ifdef DynamicFIFO
// DYNFIFOS: Dynamic FIFO Sizing Option bit
// 1 = Dynamic FIFO sizing is supported
// 0 = No Dynamic FIFO sizing is supported
USBE0CSR3bits.DYNFIFOS = 1;

#else
// DYNFIFOS: Dynamic FIFO Sizing Option bit
// 1 = Dynamic FIFO sizing is supported
// 0 = No Dynamic FIFO sizing is supported
USBE0CSR3bits.DYNFIFOS = 0;

USBCSR3bits.ENDPOINT = 1;
USBFIFOAbits.TXFIFOAD = 0x0040; // Transmit Endpoint FIFO Address bits (64 dec.)

USBCSR3bits.ENDPOINT = 2;
USBFIFOAbits.RXFIFOAD = 0x0440; // Receive Endpoint FIFO Address bits (1088 dec.)

USBCSR3bits.ENDPOINT = 3;
USBFIFOAbits.RXFIFOAD = 0x0840; // Receive Endpoint FIFO Address bits (2112 dec.)

USBCSR3bits.ENDPOINT = 4;
USBFIFOAbits.TXFIFOAD = 0x0A40; // Transmit Endpoint FIFO Address bits (2624 dec.)

USBCSR3bits.ENDPOINT = 5;
USBFIFOAbits.RXFIFOAD = 0x0A48; // Receive Endpoint FIFO Address bits (2632 dec.)

USBCSR3bits.ENDPOINT = 6;
USBFIFOAbits.TXFIFOAD = 0x0A50; // Transmit Endpoint FIFO Address bits (2640 dec.)

USBCSR3bits.ENDPOINT = 7;
USBFIFOAbits.TXFIFOAD = 0x0A58; // Transmit Endpoint FIFO Address bits (2648 dec.)

USBCSR3bits.ENDPOINT = 7;
USBFIFOAbits.RXFIFOAD = 0x0E58; // Receive Endpoint FIFO Address bits (3672 dec.)
#endif

// Datasheet DS60001320E-page 232
// 1111 = Reserved
// 1110 = Reserved
// 1101 = 8192 bytes
// 1100 = 4096 bytes
// 1011 = 2048 bytes
// 1010 = 1024 bytes
// 1001 = 512 bytes
// 1000 = 256 bytes
// 0111 = 128 bytes
// 0110 = 64 bytes
// 0101 = 32 bytes
// 0100 = 16 bytes
// 0011 = 8 bytes
// 0010 = Reserved
// 0001 = Reserved
// 0000 = Reserved or endpoint has not been configured
USBE1CSR3bits.TXFIFOSZ = 0xB; // Transmit FIFO Size bits - 2048 bytes
USBE2CSR3bits.RXFIFOSZ = 0x3; // Receive FIFO Size bits - 8 bytes
USBE3CSR3bits.RXFIFOSZ = 0xB; // Receive FIFO Size bits - 2048 bytes
USBE4CSR3bits.TXFIFOSZ = 0x3; // Transmit FIFO Size bits - 8 bytes
USBE5CSR3bits.RXFIFOSZ = 0x3; // Receive FIFO Size bits - 8 bytes
USBE6CSR3bits.TXFIFOSZ = 0x3; // Transmit FIFO Size bits - 8 bytes

USBE7CSR3bits.RXFIFOSZ = 0xA; // Receive FIFO Size bits - 1024 bytes
USBE7CSR3bits.TXFIFOSZ = 0xA; // Transmit FIFO Size bits - 1024 bytes

// Endpoint TX/RX Polling Interval/NAK Limit bits
// For Interrupt and Isochronous transfers, this field defines the polling
// interval for the endpoint. For Bulk end-points, this field sets the
// number of frames/microframes after which the endpoint should time out on
// receiving a stream of NAK responses.
//
// Transfer Type Speed Valid Values(m) Interpretation
// Isochronous Full or High 0x01 to 0x10 Polling interval is
// 2^(m-1) frames/microframes.
USBE1CSR2bits.TXINTERV = 0x01; // Poll every microframe (8th of a frame)
USBE2CSR3bits.RXINTERV = 0x04; // Poll every 8 microframes (once per frame)
USBE3CSR3bits.RXINTERV = 0x01; // Poll every microframe (8th of a frame)
USBE4CSR2bits.TXINTERV = 0x04; // Poll every 8 microframes (once per frame)

// MULT<4:0>: Multiplier Control bits
// For Isochronous/Interrupt endpoints or of packet splitting on Bulk
// endpoints, multiplies RXMAXP/TXMAXP by MULT+1 for the payload size.
// For Bulk endpoints, MULT can be up to 32 and defines the number of ?USB?
// packets of the specified payload into which a single data packet placed
// in the FIFO should be split, prior to transfer. The data packet is
// required to be an exact multiple of the payload specified by TXMAXP.
// For Isochronous/Interrupts endpoints operating in Hi-Speed mode, MULT may
// be either 2 or 3 and specifies the maximum number of such transactions
// that can take place in a single microframe.
USBE1CSR0bits.MULT = 3; // TX
//USBE2CSR1bits.MULT = 2; // RX
USBE3CSR1bits.MULT = 3; // RX
//USBE4CSR0bits.MULT = 2; // TX

// NOTE: We don't set the TX speed in device mode, as noted below from the
// data sheet (DS60001320D-page 223):
// TX Endpoint Operating Speed Control bits (Host mode)
// In HOST mode it would use CSR2 to set the TX speed, for example:
// USBExCSR2bits.SPEED = z;
// Where x is the endpoint number and z is the speed.
// USBEnCSR2 for TX endpoint, USBEnCSR3 for RX endpoint
USBE0CSR2bits.SPEED = 1; // Endpoint 0 Operating Speed Control bits
//USBE1CSR2bits.SPEED = 1; // Endpoint 1: TX Endpoint Operating Speed Control bits - High speed
USBE2CSR3bits.SPEED = 1; // Endpoint 2: RX Endpoint Operating Speed Control bits - High speed
USBE3CSR3bits.SPEED = 1; // Endpoint 3: RX Endpoint Operating Speed Control bits - High speed
//USBE4CSR2bits.SPEED = 1; // Endpoint 4: TX Endpoint Operating Speed Control bits - High speed
USBE5CSR3bits.SPEED = 1; // Endpoint 5: RX Endpoint Operating Speed Control bits - High speed
//USBE6CSR2bits.SPEED = 1; // Endpoint 6: TX Endpoint Operating Speed Control bits - High speed
USBE7CSR3bits.SPEED = 1; // Endpoint 7: RX Endpoint Operating Speed Control bits - High speed

// ISO: Isochronous Endpoint Control bit (Device mode)
// 1 = Enable the TX/RX endpoint for Isochronous transfers
// 0 = Enable the TX/RX endpoint for Bulk/Interrupt transfers
// USBEnCSR0 for TX endpoint, USBEnCSR1 for RX endpoint
USBE1CSR0bits.ISO = 1; // Isochronous TX Endpoint Enable bit (Device mode).
USBE2CSR1bits.ISO = 1; // Isochronous RX Endpoint Enable bit (Device mode).
USBE3CSR1bits.ISO = 1; // Isochronous RX Endpoint Enable bit (Device mode).
USBE4CSR0bits.ISO = 1; // Isochronous TX Endpoint Enable bit (Device mode).
USBE5CSR1bits.ISO = 0; // Isochronous RX Endpoint Disable bit (Device mode).
USBE6CSR0bits.ISO = 0; // Isochronous TX Endpoint Disable bit (Device mode).

USBE7CSR1bits.ISO = 0; // Isochronous RX Endpoint Disable bit (Device mode).
USBE7CSR0bits.ISO = 0; // Isochronous TX Endpoint Disable bit (Device mode).

// AUTOCLR: RXPKTRDY Automatic Clear Control bit
// 1 = RXPKTRDY will be automatically cleared when a packet of RXMAXP bytes
// has been unloaded from the RX FIFO. When packets of less than the maximum
// packet size are unloaded, RXPKTRDY will have to be cleared manually. When
// using a DMA to unload the RX FIFO, data is read from the RX FIFO in 4-byte
// chunks regardless of the RXMAXP.
// 0 = No automatic clearing of RXPKTRDY
USBE3CSR1bits.AUTOCLR = 0; // was commented out.

#define USBDMAenable

#ifdef USBDMAenable
/********** USB DMA Initialization **********/
IFS4CLR = _IFS4_USB_DMA_EVENT_MASK;

USBDMAINT = 0x00; // Clear Channels 1-8 USB DMA Interrupt Flags

// Set the USB DMA Interrupt Priority and Sub-Priority Levels
IPC33bits.USBDMAIP = 6;
IPC33bits.USBDMAIS = 0;

// DMABRSTM<1:0>: DMA Burst Mode Selection bit
// 11 = Burst Mode 3: INCR16, INCR8, INCR4 or unspecified length
// 10 = Burst Mode 2: INCR8, INCR4 or unspecified length
// 01 = Burst Mode 1: INCR4 or unspecified length
// 00 = Burst Mode 0: Bursts of unspecified length
USBDMA1Cbits.DMABRSTM = 3;
USBDMA3Cbits.DMABRSTM = 3;// 0

// DMAEP<3:0>: DMA Endpoint Assignment bits
// These bits hold the endpoint that the DMA channel is assigned to. Valid values are 0-7.
USBDMA1Cbits.DMAEP = 1; // IN Endpoint 1
USBDMA3Cbits.DMAEP = 3; // OUT Endpoint 3

// DMAREQEN: Endpoint DMA Request Enable bit
// 1 = DMA requests are enabled for this endpoint
// 0 = DMA requests are disabled for this endpoint
// USBIENCSR0 for TX endpoint, USBIENCSR1 for RX endpoint
USBE1CSR0bits.DMAREQEN = 1;
USBE3CSR1bits.DMAREQEN = 1;

// DMAREQMD: DMA Request Mode Selection bit
// 1 = DMA Request Mode 1
// 0 = DMA Request Mode 0
// USBIENCSR0 for TX endpoint, USBIENCSR1 for RX endpoint
USBE1CSR0bits.DMAREQMD = 1;
USBE3CSR1bits.DMAREQMD = 1;

// DMAMODE: DMA Transfer Mode bit
// 1 = DMA Mode 1 Transfers
// 0 = DMA Mode 0 Transfers
USBDMA1Cbits.DMAMODE = 1;// 0
USBDMA3Cbits.DMAMODE = 1;// 0

// DMADIR: DMA Transfer Direction bit
// 1 = DMA Read (TX endpoint)
// 0 = DMA Write (RX endpoint)
USBDMA1Cbits.DMADIR = 1; // 1
USBDMA3Cbits.DMADIR = 0; // 0

// DMAADDR<31:0>: DMA Memory Address bits
// This register identifies the current memory address of the corresponding
// DMA channel. The initial memory address written to this register during
// initialization must have a value such that its modulo 4 value is equal
// to '0'. The lower two bits of this register are read only and cannot be
// set by software. As the DMA transfer progresses, the memory address will
// increment as bytes are transferred.
USBDMA1Abits.DMAADDR = KVA_TO_PA(&USB_EP1_buffer); // USB DMA1 memory address.
USBDMA3Abits.DMAADDR = KVA_TO_PA(&USB_EP3_buffer); // USB DMA3 memory address.
//USBDMA3Abits.DMAADDR = KVA_TO_PA(&USB_EP3_buffer) & 0xFFFFFFFC; // USB DMA3 memory address.
////USBDMA3Abits.DMAADDR = KVA_TO_PA(&SPI2BUF) & 0xFFFFFFFC; // USB DMA3 memory address.

// DMACOUNT<31:0>: DMA Transfer Count bits
// This register identifies the current DMA count of the transfer. Software
// will set the initial count of the transfer which identifies the entire
// transfer length. As the count progresses this count is decremented as
// bytes are transferred.
//USBDMA1Nbits.DMACOUNT = EP1TXBUFFSIZE; // <- if enabled and no data the USB DMA ISR never cleared
//USBDMA3Nbits.DMACOUNT = EP3RXBUFFSIZE;

// TXEDMA: TX Endpoint DMA Assertion Control bit
// 1 = DMA_REQ signal for all IN endpoints will be deasserted when MAXP-8 bytes
// have been written to an endpoint. This is Early mode.
// 0 = DMA_REQ signal for all IN endpoints will be deasserted when MAXP bytes
// have been written to an endpoint. This is Late mode.
USBOTGbits.TXEDMA = 0; // 0

// RXEDMA: RX Endpoint DMA Assertion Control bit
// 1 = DMA_REQ signal for all OUT endpoints will be deasserted when MAXP-8 bytes
// have been written to an endpoint. This is Early mode.
// 0 = DMA_REQ signal for all OUT endpoints will be deasserted when MAXP bytes
// have been written to an endpoint. This is Late mode.
USBOTGbits.RXEDMA = 0; // 0


// DMAIE: DMA Interrupt Enable bit
// 1 = Interrupt is enabled for this channel
// 0 = Interrupt is disabled for this channel
USBDMA1Cbits.DMAIE = 1;
USBDMA3Cbits.DMAIE = 1;

IEC4bits.USBDMAIE = 1; // Enable USB DMA interrupts.
#endif
/* Enable Endpoint interrupts */
USBCSR1bits.EP0IE = 1; // Endpoint 0 interrupt enable
USBCSR1bits.EP1TXIE = 1; // Endpoint 1 TX interrupt enable
USBCSR2bits.EP2RXIE = 1; // Endpoint 2 RX interrupt enable
USBCSR2bits.EP3RXIE = 1; // Endpoint 3 RX interrupt enable
USBCSR1bits.EP4TXIE = 1; // Endpoint 4 TX interrupt enable
USBCSR2bits.EP5RXIE = 1; // Endpoint 5 RX interrupt enable
USBCSR1bits.EP6TXIE = 1; // Endpoint 6 TX interrupt enable

USBCSR2bits.EP7RXIE = 1; // Endpoint 7 RX interrupt enable
USBCSR1bits.EP7TXIE = 1; // Endpoint 7 TX interrupt enable

USBCSR2bits.SOFIE = 0; // Disable Start of Frame event interrupt.

USBCSR2bits.RESETIE = 1; // Enable USB Reset Interrupt.

USBCRCONbits.USBIE = 1; // Enable General/Global Interrupts from USB module
IEC4bits.USBIE = 1; // Enable the USB Interrupt.

}

 
When it's first called after detecting VBUS: 
initUSB(0);

It turns off the USB module, which disconnects it from the bus, then resets all of the registers including the USB address of the device: USBCSR0bits.FUNC = 0;
 
In the USB reset ISR I had:
initUSB(1);

Which only resets the registers without turning off the module or resetting the USB address.
 I will have to test that with Windows and see if it works as it should.
I primarily use MacOS and didn't see it being necessary.

My configuration:
MacBook Pro (Retina, 15-inch, Mid 2015) with MacOS Mojave (10.14.6) and MPLAB X IDE v5.30
 
Curiosity PIC32MZ EF 1 & 2, PIC24F Curiosity, XPRESS EVAL BOARD (PIC16F18855), SAMA5D3 Xplained and various custom boards.
#84
vexorg
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Re: HOW TO: PIC32MZ USB without Harmony 2020/05/10 14:33:57 (permalink)
5 (1)
That is a great bit of code, must simpler than the hamony nonsense.
 
I'm wondering if anyone has done similar for the pic32mz being a host?
My plan has been to take the harmony code, make it run standalone, and then strip it down.
 
Harmony works to the point of trying to open the device, then it falls apart as it's a custom device, and would need the microchip device driver's written. The reason for making it standalone was so I could edit the files, harmony seems to include 90% of it's own reference files in the project.
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MisterHemi
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Re: HOW TO: PIC32MZ USB without Harmony 2020/05/10 15:02:58 (permalink)
4 (1)
vexorg
That is a great bit of code, must simpler than the hamony nonsense.
 
I'm wondering if anyone has done similar for the pic32mz being a host?
My plan has been to take the harmony code, make it run standalone, and then strip it down.
 
Harmony works to the point of trying to open the device, then it falls apart as it's a custom device, and would need the microchip device driver's written. The reason for making it standalone was so I could edit the files, harmony seems to include 90% of it's own reference files in the project.


I've considered attempting writing a host stack but don't know when I would do it.
 
I'll have to think about that. I kinda wish the PIC32MZ had 2 or 3 USB ports so you could
connect it to a computer and also it could have it's own accessories (e.g.- keyboard, mouse, drive, etc)

My configuration:
MacBook Pro (Retina, 15-inch, Mid 2015) with MacOS Mojave (10.14.6) and MPLAB X IDE v5.30
 
Curiosity PIC32MZ EF 1 & 2, PIC24F Curiosity, XPRESS EVAL BOARD (PIC16F18855), SAMA5D3 Xplained and various custom boards.
#86
MisterHemi
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Re: HOW TO: PIC32MZ USB without Harmony 2020/05/10 23:36:08 (permalink)
0
When the forum allows i'll add this to the first post, right now nothing is working with the editing:
 
UPDATE - 10 May 2020:
I added a "drop in" USB CDC ACM project on GitHub (see the above link). The main.c is only to be used as a reference, there are some settings or initializations you'd need to add/include in your own project's main.c file.
 
It will work as-is as an example or for testing but it's intended to be copied into your project to save time and effort.
You only need to copy everything except the main.c file unless you intend to start your project with that.
 
There are four (4) files:
main.c
usb_cdc_acm.c
usb.h
usb_descriptors.h
 
NOTE: Pin/Port F3 is used on 100 and 144 pin device for the USBID. It may be different on other packages.
You can find the board initialization void initBoard() in main.c and you'll see:
 CNPUFbits.CNPUF3 = 1;       // Pull-up enables on RPF3 (To set USB as a B-Device ) 


My configuration:
MacBook Pro (Retina, 15-inch, Mid 2015) with MacOS Mojave (10.14.6) and MPLAB X IDE v5.30
 
Curiosity PIC32MZ EF 1 & 2, PIC24F Curiosity, XPRESS EVAL BOARD (PIC16F18855), SAMA5D3 Xplained and various custom boards.
#87
JPortici
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Re: HOW TO: PIC32MZ USB without Harmony 2020/05/11 00:03:46 (permalink)
0
MisterHemi
I'll have to think about that. I kinda wish the PIC32MZ had 2 or 3 USB ports so you could
connect it to a computer and also it could have it's own accessories (e.g.- keyboard, mouse, drive, etc)



PIC32MK has two usb peripherals!
(and a completely different one. I tried -without much effort- to port your code but as i know almost nothing about usb i didn't know if i was doing the right thing or how to debug it)
#88
vexorg
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Re: HOW TO: PIC32MZ USB without Harmony 2020/05/11 03:52:04 (permalink)
4 (1)
The MK is a very different chip, and much simpler as better examples out there for it.
#89
MisterHemi
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Re: HOW TO: PIC32MZ USB without Harmony 2020/07/16 22:27:33 (permalink)
4 (1)
Here are some updates. I've tried editing the first post using the work arounds but to no avail.
I'll try again later.... I have good news regarding USB DMA.
 
UPDATE - 15 July 2020:
I recently acquired some PIC32MZ Revision B2 silicon. Initially the USB interrupt was working intermittently but rarely.
I was able to resolve the problem after adding some code at the end of the initialization function, just before enabling the interrupts. Here is the additional code:

// VBUSMONEN: VBUS Monitoring for OTG Enable bit
// 1 = Enable monitoring for VBUS in VBUS Valid range (between 4.4V and 4.75V) 
// 0 = Disable monitoring for VBUS in VBUS Valid range
USBCRCONbits.VBUSMONEN = 1;
// USBIDOVEN: USB ID Override Enable bit
// 1 = Enable use of USBIDVAL bit
// 0 = Disable use of USBIDVAL and instead use the PHY value
USBCRCONbits.USBIDOVEN = 1;
// USBIDVAL: USB ID Value bit 
// 1 = ID override value is 1 (Device)
// 0 = ID override value is 0 (Host)
USBCRCONbits.USBIDVAL = 1;

This resolved the intermittent enumeration on the PIC32MZ EF revision B2 silicon, however at the moment i'm still having the same issue with the PIC32MZ2064DAS176. I will post an update once that is resolved too.
 
UPDATE - 16 July 2020:
I seem to have got the USB DMA working. I'll post more details soon. I'll continue testing it first.

My configuration:
MacBook Pro (Retina, 15-inch, Mid 2015) with MacOS Mojave (10.14.6) and MPLAB X IDE v5.30
 
Curiosity PIC32MZ EF 1 & 2, PIC24F Curiosity, XPRESS EVAL BOARD (PIC16F18855), SAMA5D3 Xplained and various custom boards.
#90
vexorg
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Re: HOW TO: PIC32MZ USB without Harmony 2020/08/01 06:53:27 (permalink)
4 (1)
Just for interest, the host mode turns out to be incredibly simple to do, the trick is known what to do and took unpicking the harmony code to get to the bottom of. Little more than a dozen lines of code. If needs to be more flexible it would need some additions, I had hard set some values, like high speed and endpoints, since I know our board is hardwired and would never be unplugged in use, though it does handle that.
 
The second part to it is a good understanding of the USB initial handshaking. Once you get your head round the levels for "devices", "interfaces", and "endpoints" it is much easier.
 
I ended up writing some low level endpoint transfer routines, read & write command endpoint, read & write data end points, and an initialising routine (that could do more, but mine only looks for our custom usb device though vid/pid).
 
The whole USB comms interface is a bit poor, You can send some data or commands out to an endpoint, but to get the data back you must tell the MZ USB to read and hope the data has been loaded at the remote end. So it the device has go to go do something then you need to know when to ask for the data.
#91
vexorg
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Re: HOW TO: PIC32MZ USB without Harmony 2020/08/01 06:53:27 (permalink)
0
Just for interest, the host mode turns out to be incredibly simple to do, the trick is known what to do and took unpicking the harmony code to get to the bottom of. Little more than a dozen lines of code. If needed to be more flexible it would need some additions, I had hard set some values, like high speed and endpoints, since I know our board is hardwired and would never be unplugged in use, though it does handle that.
 
The second part to it is a good understanding of the USB initial handshaking. Once you get your head round the levels for "devices", "interfaces", and "endpoints" it is much easier.
 
I ended up writing some low level endpoint transfer routines, read & write command endpoint, read & write data end points, and an initialising routine (that could do more, but mine only looks for our custom usb device though vid/pid).
 
The whole USB comms interface is a bit poor, You can send some data or commands out to an endpoint, but to get the data back you must tell the MZ USB to read and hope the data has been loaded at the remote end. So it the device has go to go do something then you need to know when to ask for the data.
#92
MisterHemi
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Re: HOW TO: PIC32MZ USB without Harmony 2020/08/01 09:25:18 (permalink)
0
vexorg
Just for interest, the host mode turns out to be incredibly simple to do, the trick is known what to do and took unpicking the harmony code to get to the bottom of. Little more than a dozen lines of code. If needed to be more flexible it would need some additions, I had hard set some values, like high speed and endpoints, since I know our board is hardwired and would never be unplugged in use, though it does handle that.
 
The second part to it is a good understanding of the USB initial handshaking. Once you get your head round the levels for "devices", "interfaces", and "endpoints" it is much easier.
 
I ended up writing some low level endpoint transfer routines, read & write command endpoint, read & write data end points, and an initialising routine (that could do more, but mine only looks for our custom usb device though vid/pid).
 
The whole USB comms interface is a bit poor, You can send some data or commands out to an endpoint, but to get the data back you must tell the MZ USB to read and hope the data has been loaded at the remote end. So it the device has go to go do something then you need to know when to ask for the data.




 
From looking at the host requirements it didn't seem too difficult, I just haven't spend the time yet to implement it as i've been busy with digital audio in device mode and having a few odd issues with I2C3 on the B2 silicon.
 
I need I2C3 to send commands to some PLLs i'm using to generate audio clocks. The pins can be toggled manually but not working when using I2C3.
 
As for a host.... I have some ideas how it can handle more than one device with the addition/use of a hub. Since the device is responsible for assigning addresses to the devices it shouldn't be too difficult.
 
The only complex issue might be in regards to what type (HID, CDC, etc) and how many devices you want to handle and creating drivers for those.

My configuration:
MacBook Pro (Retina, 15-inch, Mid 2015) with MacOS Mojave (10.14.6) and MPLAB X IDE v5.30
 
Curiosity PIC32MZ EF 1 & 2, PIC24F Curiosity, XPRESS EVAL BOARD (PIC16F18855), SAMA5D3 Xplained and various custom boards.
#93
vexorg
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Re: HOW TO: PIC32MZ USB without Harmony 2020/08/22 02:50:54 (permalink)
5 (1)
The hub part is handled by the host, you simply have a hub address in the registers to handle that.
#94
Wavelength
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Re: HOW TO: PIC32MZ USB without Harmony 2020/09/03 13:29:16 (permalink)
4 (1)
MisterHemi,
 
I stopped working on the MZ USB Audio about a year ago. The USB HS stuff was actually pretty easy. The I2S stuff was totally screwed up. The example code given in the harmony folder for mac high speed scared me about a month in when it had a comment in the startup section about forcing the word clock to a specific high or low and restarting the I2S a boat load of times and some comment stating this was the only way I could make it work. I later found out that was the senior engineer in charge of that project. He no longer works at Microchip.
 
It seems if you set the sample rate and leave it there and let the OS resample to whatever that rate you have the default then the MZ works fine. But if you change the sample rate using apps that do that like Roon, Audirvana, Bit Perfect, Pure Music ect.... then the word clock line in the I2S drifts and of course you get goobled output. One company I know has this working with SPI dac chips but it took them 3 years to do that. Another company claimed to have it working and I said try this, they did and that product got pulled.
 
There was someone on the boards here who had rewritten the I2S code from scratch and had that working really well and was going to add in the USB code and the buffering. I haven't heard from him in a year so I don't know how that went. I have a couple 100K dacs running on PIC32MX270, 274, 470 parts in all configurations without issues. The MZ was the worst year of my life and I had already done the XMOS stuff from scratch like 10 years before that.
 
Anyway, just a word of warning.
 
Thanks,
Gordon
#95
MisterHemi
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Re: HOW TO: PIC32MZ USB without Harmony 2020/09/04 09:23:24 (permalink)
0
Wavelength
MisterHemi,
 
I stopped working on the MZ USB Audio about a year ago. The USB HS stuff was actually pretty easy. The I2S stuff was totally screwed up. The example code given in the harmony folder for mac high speed scared me about a month in when it had a comment in the startup section about forcing the word clock to a specific high or low and restarting the I2S a boat load of times and some comment stating this was the only way I could make it work. I later found out that was the senior engineer in charge of that project. He no longer works at Microchip.
 
It seems if you set the sample rate and leave it there and let the OS resample to whatever that rate you have the default then the MZ works fine. But if you change the sample rate using apps that do that like Roon, Audirvana, Bit Perfect, Pure Music ect.... then the word clock line in the I2S drifts and of course you get goobled output. One company I know has this working with SPI dac chips but it took them 3 years to do that. Another company claimed to have it working and I said try this, they did and that product got pulled.
 
There was someone on the boards here who had rewritten the I2S code from scratch and had that working really well and was going to add in the USB code and the buffering. I haven't heard from him in a year so I don't know how that went. I have a couple 100K dacs running on PIC32MX270, 274, 470 parts in all configurations without issues. The MZ was the worst year of my life and I had already done the XMOS stuff from scratch like 10 years before that.
 
Anyway, just a word of warning.
 
Thanks,
Gordon




Thanks Gordon,
 
I wrote my I2S code from scratch, I pretty much never use Harmony. It has its purposes and it's usefule for some people but to me it's very bloated and inefficient.
 
Currently i'm trying to use an external PLL as the audio clock. The PIC32MZ does seem to do I2S things in a strange way. It's either master mode using it's own clock or slave mode using an external clock.
 
I want to use it as a master but using an external clock from the external PLL.
 
I'm also trying to familiarize myself with the SAME70 and SAM9X60 and intend to eventually port the code over to one of those (preferably the faster processor) however I only have a SAME70 board.
 
Having been off and on work furloughs (due to the pandemic) my budget is very stretched but I hope eventually to resume things fairly soon.
 
I do wish Microchip would release some faster PIC32's with MIPS cores and few or no erratas but that's wishful thinking. In general I find the MIPS based cores easy to use but, as you know, the peripherals have their issues.
 
So far in my USB Audio project I can turn on/off the in and out audio interfaces, change the sample rates -but can't actually test the PLLs yet as I need to trouble shoot them.  More or less I can receive all of the audio parameters via USB.
 
I finally got the USB DMA working and I intend to post that soon. It's not as difficult as I originally thought, it's just the order of operations that wasn't making sense at first.
 
I have a lot more to do and test and i've been back and forth with things lately - either software only or hardware and software when the budget allows it. I'd like to do more things but i'll have to wait.
 
I'm designing some music synthesizers (keyboards/sound modules) and intend to use the PIC32MZ in the mid-range unit. I have plans for a high-end/flagship unit but it's requires significantly more power processors.
 
You mentioned the XMOS XCORE processors, I was also using an XCORE-200 briefly but got a bit frustrated because of the strict rules when coding in XC. I need multiple processes to communicate with each other but in XMOS XC there's one software "interface" between one process and another, and it can't be shared with other processes.
 
I understand their logic.... like having semaphores, etc like a multitasking OS would have but I need an easy way to share data, states, etc. So i'm taking a break for a while on XMOS XC.

My configuration:
MacBook Pro (Retina, 15-inch, Mid 2015) with MacOS Mojave (10.14.6) and MPLAB X IDE v5.30
 
Curiosity PIC32MZ EF 1 & 2, PIC24F Curiosity, XPRESS EVAL BOARD (PIC16F18855), SAMA5D3 Xplained and various custom boards.
#96
vexorg
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Re: HOW TO: PIC32MZ USB without Harmony 2020/09/04 10:10:59 (permalink)
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Pretty sure all SPI/I2S/I2C type systems has the master clock the data, hence it must control it, and slave device need a clock from the master.
 
You may be able to use that external clock as the primary oscillator, and the i2s bus would be synchronised to that through the PBx config.
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MisterHemi
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Re: HOW TO: PIC32MZ USB without Harmony 2020/09/04 10:36:54 (permalink)
0
vexorg
Pretty sure all SPI/I2S/I2C type systems has the master clock the data, hence it must control it, and slave device need a clock from the master.
 
You may be able to use that external clock as the primary oscillator, and the i2s bus would be synchronised to that through the PBx config.




That's basically what I had in mind was to use the external PLL as the master clock. I'm using a Silicon Labs SI5351A PLL that has a few programmable outputs which I can use to generate the various clocks.

My configuration:
MacBook Pro (Retina, 15-inch, Mid 2015) with MacOS Mojave (10.14.6) and MPLAB X IDE v5.30
 
Curiosity PIC32MZ EF 1 & 2, PIC24F Curiosity, XPRESS EVAL BOARD (PIC16F18855), SAMA5D3 Xplained and various custom boards.
#98
Wavelength
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Re: HOW TO: PIC32MZ USB without Harmony 2020/09/04 11:35:10 (permalink)
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MH,
 
Ahhh I think if you mention a product from another company the damn forum will not let you post. I wrote like 3 pages of stuff... Ok let's try this again... So after 8 months of the I2S problem, in that I tried external fixed oscillators at 45.1584/49.152 for standard sample rates and then fixed 24Mhz and 48Mhz with internal PLL and then I tried and rewrote the code for SLAVE mode.
 
I had a couple of meetings with the top cheese at Microchip as we had a fair size product offering. They wouldn't admit the problem so I went back loaded up the project they had with the eval board and everything just like they had it and showed them the same problem. It got really heated and one of the guys stormed out after I said I could all all this on the MX so what's the problem with the MZ. He said it was impossible to do that successfully on the MX and stormed out.

Here is the code in question... this resides in the USB DMA ISR code and is called 1000 (LRCLOCKSYNC) times (~1ms) now remember I2S is async to the USB DMA ISR.
/*****************************************************
 * This function is called from the DMA Channel 0 interrupt handler in system_interrupt.c
 * to synchronize up the I2S LRCLK when the audio stream is restarted. Otherwise, the left/right
 * channels may become swapped.
 *****************************************************/
/******************************************************************************
  Function:
    void syncLRClock( void )
 */

void syncLRClock( void )
{
  if (LRClockSync>0)
  {
    if (LRClockSync!=1)
    {
    }
    else // = 1, therefore will be decremented to 0 before leaving function
    {
       PLIB_SPI_Disable(DRV_I2S_PERIPHERAL_ID_IDX0); // turn off SPI interface
       if (appData.codecClient.samplingRate <= APP_USB_AUDIO_SAMPLING_RATE_48KHZ)
       {
          PLIB_SPI_FrameSyncPulsePolaritySelect(DRV_I2S_PERIPHERAL_ID_IDX0, 1); // invert polarity, otherwise L/R are always backwards
        }
        else
        {
           PLIB_SPI_FrameSyncPulsePolaritySelect(DRV_I2S_PERIPHERAL_ID_IDX0, 0); // regular polarity for higher bitrates
         }
         PLIB_SPI_Enable(DRV_I2S_PERIPHERAL_ID_IDX0); // turn SPI interface back on again (restarts LRCLK)
      }

       LRClockSync--; // seems to work better if we do this more than once, # is defined as LRCLOCKSYNC
    }
}

 
~~~
SAM parts are ok, but the I2S is not that great. Try the i.MX6ULL or the new i.MX8 they have great I2S.
~~~
XMOS marketing sucks... originally these parts were single core 6-8 threads, or multiple cores with 8 threads each. Each core has it's own memory for execution and storage. There are asm code all over the place for bypassing the compiler and sending memory stuff to other threads (or now what they call cores). XMOS is simple, but it supports a freaken ton of stuff now so optimizing something is kind of hard.
 
Thanks,
Gordon
#99
MisterHemi
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Re: HOW TO: PIC32MZ USB without Harmony 2020/09/04 13:45:27 (permalink)
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Wavelength
MH,
 
Ahhh I think if you mention a product from another company the damn forum will not let you post. I wrote like 3 pages of stuff... Ok let's try this again... So after 8 months of the I2S problem, in that I tried external fixed oscillators at 45.1584/49.152 for standard sample rates and then fixed 24Mhz and 48Mhz with internal PLL and then I tried and rewrote the code for SLAVE mode.
 
I had a couple of meetings with the top cheese at Microchip as we had a fair size product offering. They wouldn't admit the problem so I went back loaded up the project they had with the eval board and everything just like they had it and showed them the same problem. It got really heated and one of the guys stormed out after I said I could all all this on the MX so what's the problem with the MZ. He said it was impossible to do that successfully on the MX and stormed out.

Here is the code in question... this resides in the USB DMA ISR code and is called 1000 (LRCLOCKSYNC) times (~1ms) now remember I2S is async to the USB DMA ISR.
/*****************************************************
 * This function is called from the DMA Channel 0 interrupt handler in system_interrupt.c
 * to synchronize up the I2S LRCLK when the audio stream is restarted. Otherwise, the left/right
 * channels may become swapped.
 *****************************************************/
/******************************************************************************
  Function:
    void syncLRClock( void )
 */

void syncLRClock( void )
{
  if (LRClockSync>0)
  {
    if (LRClockSync!=1)
    {
    }
    else // = 1, therefore will be decremented to 0 before leaving function
    {
       PLIB_SPI_Disable(DRV_I2S_PERIPHERAL_ID_IDX0); // turn off SPI interface
       if (appData.codecClient.samplingRate <= APP_USB_AUDIO_SAMPLING_RATE_48KHZ)
       {
          PLIB_SPI_FrameSyncPulsePolaritySelect(DRV_I2S_PERIPHERAL_ID_IDX0, 1); // invert polarity, otherwise L/R are always backwards
        }
        else
        {
           PLIB_SPI_FrameSyncPulsePolaritySelect(DRV_I2S_PERIPHERAL_ID_IDX0, 0); // regular polarity for higher bitrates
         }
         PLIB_SPI_Enable(DRV_I2S_PERIPHERAL_ID_IDX0); // turn SPI interface back on again (restarts LRCLK)
      }

       LRClockSync--; // seems to work better if we do this more than once, # is defined as LRCLOCKSYNC
    }
}

 
~~~
SAM parts are ok, but the I2S is not that great. Try the i.MX6ULL or the new i.MX8 they have great I2S.
~~~
XMOS marketing sucks... originally these parts were single core 6-8 threads, or multiple cores with 8 threads each. Each core has it's own memory for execution and storage. There are asm code all over the place for bypassing the compiler and sending memory stuff to other threads (or now what they call cores). XMOS is simple, but it supports a freaken ton of stuff now so optimizing something is kind of hard.
 
Thanks,
Gordon




Thanks Gordon!
 
I've looked some of the i.MX and QorIQ processors before but ... if I remember correctly... they require CodeWarrior which has a big price tag. I'm completely self funded and a small start up. 
 
I have been wondering if there were some other compilers such as GCC or something that could be used with Eclipse. 
 
 
Thanks,
Mark

My configuration:
MacBook Pro (Retina, 15-inch, Mid 2015) with MacOS Mojave (10.14.6) and MPLAB X IDE v5.30
 
Curiosity PIC32MZ EF 1 & 2, PIC24F Curiosity, XPRESS EVAL BOARD (PIC16F18855), SAMA5D3 Xplained and various custom boards.
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