Hot!Preserve content of internal DDR RAM in DA series after a soft reset

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marekb
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2019/01/17 15:30:20 (permalink)
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Preserve content of internal DDR RAM in DA series after a soft reset

I'm curious - is there any way to preserve ddr ram content after a soft reset? It's look like the ddr ram init functions (DDR_Init(), DDR_PHY_Init(), DDR_PHY_Calib()) have impact on ddr content. The strange thing is, that when I write my own data to ddr ram and call SYS_RESET_SoftwareReset() than after reset ddr ram content is differ but always have  the same   "initial" values (starting from 0x88000000 address): 56 56 4A 4A 0E 0E F1 F1 E0 E0 3D 3D 9B 9B [...]. When I disable ddr init after a soft reset, ddr is unusable (mcu hangs when try fetch a data form ddr).
I modyfied ld-scritps, now linker produce binary which could be loaded in ddr ram and run from there, but still have same problems durning start-up initialziation, it genertates exception "coprocessor not found", so I suspect that ddr content  is modyfied/destroyed durning startup...
 
 
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    NorthGuy
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    Re: Preserve content of internal DDR RAM in DA series after a soft reset 2019/01/17 15:46:42 (permalink)
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    The controller needs to do calibration and the data you see are most likely written during calibration. Other areas may be intact.
     
    The memory needs regular refreshes. Therefore the memory will not hold its content without controller. If your reset lasts long enough, the content of the memory may be lost. It might be a way to force refresh immediately after initialization.
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    Jim Nickerson
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    Re: Preserve content of internal DDR RAM in DA series after a soft reset 2019/01/17 16:11:11 (permalink)
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    My first DRAM was a long time ago.
    If not refreshed you could watch the data as it was read out fade to lower and lower levels.
     
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    marekb
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    Re: Preserve content of internal DDR RAM in DA series after a soft reset 2019/01/17 16:15:20 (permalink)
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    Hmm, I thought the ddr controler inside pic32mz is a bit independent from the mcu, and when not touched or re-initialzied it could refresh w/o mcu attention.
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    Jim Nickerson
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    Re: Preserve content of internal DDR RAM in DA series after a soft reset 2019/01/17 16:35:33 (permalink)
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    Maybe Soft Reset is one of the forms of reset ?

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    marekb
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    Re: Preserve content of internal DDR RAM in DA series after a soft reset 2019/01/17 17:01:04 (permalink)
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    Yes, I read tihs datasheet section about ddr controller, let me clarify what I meant by "soft reset". In my case a "soft reset" is a jump to a new reset vector (code initialization, regular startup from crt.S) located in ddr ram (preloaded earlier by bootloader). Does it could reset the ddr registers to initial values like a cold reset?
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    Jim Nickerson
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    Re: Preserve content of internal DDR RAM in DA series after a soft reset 2019/01/17 17:31:24 (permalink)
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    Maybe it is possible to change one of the registers to be a little different than the initial cold reset values to test if your soft reset does re initialize the registers.
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    marekb
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    Re: Preserve content of internal DDR RAM in DA series after a soft reset 2019/01/18 03:05:20 (permalink)
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    OK, I sucessfuly booted bin image from the DDR and run from there, the problem was in my  ld script. 
    Very usefull, 32MB ram + code space and flash programming not reqiured any more :-).
    I've done some crc tests to check if after soft reset dram content will change. It never changed after several soft resets, so far so good... but sometimes after boot from dram I get garbage on uart  durning boot messages (printf  stdout/stderr is redirected to uart)... don't know why yet...
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    davekw7x
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    Re: Preserve content of internal DDR RAM in DA series after a soft reset 2019/01/18 09:00:06 (permalink)
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    marekb
    ...garbage on uart  durning boot...


    Here's a general suggestion concerning serial garbage upon startup (not just DDRAM boot conditions):

    Civilized startup of the serial line is aided by not allowing the UART Tx pin to float during initialization.

    Here's my regime:

    Place an external pullup (10K or so) on the UART Tx line

    In the initialization sequence:
      Set LAT bit high for the UART Tx pin
      Set TRIS bit low for the UART Tx pin
      Then, and only then, configure and enable the UART

    Sometimes:
    Give it a little delay (a character time or two) before trying to write to the UART.

    IWFMYMMV (It Works For Me; Your Mileage May Vary)

    Regards,

    Dave




    Sometimes I just can't help myself...
    #9
    marekb
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    Re: Preserve content of internal DDR RAM in DA series after a soft reset 2019/01/18 12:53:09 (permalink)
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    The uart output "garbage"  (0xff bytes in random position in boot messages  instead of the vaild chars) it was becouse second DDR initalization in booted firmware. When I skip it  (not needed now,  is already initializated by bootloader) the garbage gone, and random TLB execeptions durning boot, too. Now booting is stable, runing code too. 
    Is there anything I should pay attention with running code from DDR and moving kseg0_data_mem to DDR, too? I didn't noticed any noticable slowdown, downloading from embedded webserver is on the same speed  when code is running from flash.
     
     
     
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