Hot!18F4431 I2C SSPCON2

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Tuurbo46
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2019/01/07 09:02:57 (permalink)
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18F4431 I2C SSPCON2

Hi,
 
I am trying to setup the I2C in master mode on a 18F4431 chip.  In the datasheet on page 212 in the I2C section it quotes to refer to the midrange manual DS33023.  In this manual it has the SSPCON2 register for setting up some of the I2C parameters.  However the problem i am having whilst using MPLABX V4.05 and XC8 V1.45, is when i include the xc.h header in my program it does not recognise SSPCON2, but it recognises SSPCON.  What other header file do i require to action SSPCON2 with this chip.
 
Look forward to your reply.
 
Tuurbo46
 
 
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    Jim Nickerson
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    1and0
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    Re: 18F4431 I2C SSPCON2 2019/01/07 10:06:42 (permalink)
    +3 (3)
    Tuurbo46
    I am trying to setup the I2C in master mode on a 18F4431 chip.  In the datasheet on page 212 in the I2C section it quotes to refer to the midrange manual DS33023.  In this manual it has the SSPCON2 register for setting up some of the I2C parameters.  However the problem i am having whilst using MPLABX V4.05 and XC8 V1.45, is when i include the xc.h header in my program it does not recognise SSPCON2, but it recognises SSPCON.  What other header file do i require to action SSPCON2 with this chip.

    http://ww1.microchip.com/downloads/en/DeviceDoc/39616d.pdf
     
    There is *NO* SSPCON2 in the entire 18F4431 datasheet!
    #3
    qhb
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    Re: 18F4431 I2C SSPCON2 2019/01/07 12:35:59 (permalink)
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    All the references to the reference manual seem suspicious, as Microchip do not class PIC18F chips as "mid range".
     
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    1and0
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    Re: 18F4431 I2C SSPCON2 2019/01/07 12:52:29 (permalink)
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    From page 212 of the 18F4431 datasheet :(   LOL
    18F4431 Datasheet
    Additional information on SSP I2C operation can be found in the “PIC® Mid-Range MCU Family Reference Manual” (DS33023).

    #5
    Mysil
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    Re: 18F4431 I2C SSPCON2 2019/01/07 16:47:29 (permalink)
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    Hi,
    There may have been confusion in terminology, also within Microchip,
    but PIC18F... devices are usually referred as 'Advanced 8 bit' devices,
    There are however usually a lot of Peripherals in common between PIC16 and PIC18 devices from the same Era.
    PIC18F4431 is a old device, and is now far out of date.
     
    For details of what peripherals are available and functional in a specific device type,
    you have to refer to Datasheet and Errata document for the device type, Not a Family document, or documentation for a different device.
     
    In the product webpage for PIC18F4431 devices, there is link to Datasheet, and also a number of Errata documents,
    including a separate Errata document for the SSP peripheral.
    https://www.microchip.com/wwwproducts/en/PIC18F4431
     
    Datasheet for the device, table page 3, list SSP module I2C mode as Slave only.
    In Datasheet SSPCON register 19-2, there is:
    SSPCON.SSPM  mode 1011 = I2C Firmware Controlled Master mode (slave Idle),
    which means that I2C Master signaling must be BitBanged in Software/Firmware code.
    In the Device support file for PIC18F4431, there are no definitions for SSPCON2 either.
     
        Mysil
    #6
    qhb
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    Re: 18F4431 I2C SSPCON2 2019/01/07 17:00:39 (permalink)
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    Bottom line, that is a very old chip that is a very poor choice to implement an I2C Master with.
     
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    Tuurbo46
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    Re: 18F4431 I2C SSPCON2 2019/01/08 01:07:25 (permalink)
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    Hi,
     
    Thanks for your input.  
     
    I was looking at 18F I2C examples and they had commands PEN, RSEN, ACKDT, ACKEN etc so I guessed something was different.
     
    So moving forward, I am working on an old PCB with a TQFP44, PIC18LF4431-I/PT mounted on it.  Not fully knowing the microchip product range, is there a modern up to date pin for pin compatible TQFP44, PIC18F that will fit my PCB that has modern I2C, SPI and UART facilities.
     
    Thanks,
     
    Tuurbo46
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    Tuurbo46
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    Re: 18F4431 I2C SSPCON2 2019/01/09 01:52:57 (permalink)
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    Hi,
     
    Ok, so after contacting tech support there does not seem to be a modern solution to the 18F4431 in a TQFP44 footprint, so it is looking like i will have to resort to the bit bang I2C.
     
    Does any know of a good I2C master bit bang example that also includes the clock.
     
    Thanks,
     
    Tuurbo46
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    Tuurbo46
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    Re: 18F4431 I2C SSPCON2 2019/01/10 02:40:42 (permalink)
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    Hi,
     
    So due to the inability to change the hardware i am stuck with the 18F4431 chip and i will have to use I2C in the bit bang method.  I have initialised the I2C below in master mode, but i cannot work out how to configure the clock to 100kHz.  Could someone offer me some advice how to do this, and also can you spot any obvious mistakes?
     
    Thanks Tuurbo46
     
    void i2c_init(void)
    {

        TRISC = 0b00110000; // not_used | not_used | scl_i2c | sda_i2c | not_used | not_used | not_used | not_used
        PORTC = 0b00000000;

        SSPCONbits.SSPEN = 1; // enable the serial port and configures the SDA and SCL pins as serial port pins
        SSPCONbits.CKP = 1;     // enables clock
        SSPCONbits.SSPM3 = 1; // I2C Firmware Controlled Master Mode (slave idle) SSMP = 1011
        SSPCONbits.SSPM2 = 0;
        SSPCONbits.SSPM1 = 1;
        SSPCONbits.SSPM0 = 1;

       //Set to 100kHz
       //SSPADD = (_XTAL_FREQ/(4*clock_freq))-1; //Setting SCL frequency to 100kHz
       SSPSTAT = 0x00; //Resetting SSPSTAT register
       SSPIF = 0; //Resetting MSSP interrupt flag


    }
     
     
    #10
    qhb
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    Re: 18F4431 I2C SSPCON2 2019/01/10 02:58:30 (permalink)
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    I think you've missed the fact that your chip does NOT contain a Master mode peripheral at all.
    The "Firmware Controlled Master Mode" simplyt means you have to completely control the pins yourself, driving the clock line high and low, and the data line high and low as required. The chip doesn't do any timing for you.
     
    #11
    Tuurbo46
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    Re: 18F4431 I2C SSPCON2 2019/01/10 03:34:51 (permalink)
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    Ouch
     
    Tbh i want to upgrade the chip but the hardware wont allow it so i am stuck with bit bang.
     
    I have found a website (https://calcium3000.wordpress.com/2016/08/19/i2c-bit-banging-tutorial-part-i/) that shows an I2C bit bang example but i am struggling on the generating clock part.  Could you outline or point me to an example of how i generate a clock - im struggling on this one.
     
    Cheers,
     
    Tuurbo46
    #12
    qhb
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    Re: 18F4431 I2C SSPCON2 2019/01/10 04:33:25 (permalink)
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    It might be easier to start with this app note.
    https://www.microchip.com/wwwAppNotes/AppNotes.aspx?appnote=en011043
     
    #13
    Tuurbo46
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    Re: 18F4431 I2C SSPCON2 2019/01/10 09:29:46 (permalink)
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    Hi ghb,
     
    A couple of questions:
     
    1) So i do not use any interrupts, i just use the SDA and SCL pins as standard digital I/O pins?
     
    2) Would you recommend to debug this i get a bus reader to aid reading the signals?
     
    3) I still do not really get the clocking part but i guess i will have to test and see if it works.
     
    Thanks,
     
    Tuurbo46
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    1and0
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    Re: 18F4431 I2C SSPCON2 2019/01/10 09:40:44 (permalink)
    +1 (1)
    Tuurbo46
    1) So i do not use any interrupts, i just use the SDA and SCL pins as standard digital I/O pins?
     
    2) Would you recommend to debug this i get a bus reader to aid reading the signals?
     
    3) I still do not really get the clocking part but i guess i will have to test and see if it works.

    A1: No need for interrupts. Standard digital I/Os -- that is what bit banging is. As I2C is open-drain, clear the LAT bit and toggle the TRIS bit to output high/low. Standard push-pull I/O outputs work too if there's only one device.
     
    A2: Bus reader would help, but not necessary. I2C is a simple bus protocol.
     
    A3: Just toggle the clock pin CLK high and low manually with software. Use delay for the bit duration.
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    qhb
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    Re: 18F4431 I2C SSPCON2 2019/01/10 12:51:12 (permalink)
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    1and0
    ... Standard push-pull I/O outputs work too if there's only one device.

    Yes for SCL, but you need to make sure SDA is an input whenever the slave needs to drive it, e.g. during ACK cycles.
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    1and0
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    Re: 18F4431 I2C SSPCON2 2019/01/10 14:21:34 (permalink)
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    qhb
    ..,but you need to make sure SDA is an input whenever the slave needs to drive it, e.g. during ACK cycles.

    Yes and connect to the I2C device with a series resistor for added protection.
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    DeutcheN
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    Re: 18F4431 I2C SSPCON2 2019/01/14 14:25:12 (permalink)
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    Hi Turbo,
     
      The PIC18F45K80 or PIC18F46K80 is available in TQFP 44-pin and have an MSSP module with I2C Master capabilities.  It may be worth to look at.
     
     
    #18
    Tuurbo46
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    Re: 18F4431 I2C SSPCON2 2019/01/17 03:28:31 (permalink)
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    Hi,
     
    Thanks for your help.
     
    I have opted to stay with the 18F4431 and go the bit bang route.  I have a couple more questions:
     
    I will run the slave at 100kHz, therefore i have to put a delay between CLK_HIGH and CLK_LOW.  Below is my maths.
     
    * F = 1/T = 1/10uS = 100kHz
     
    Therefore my clock transition code should look like below using the inbuilt xc8 delay library.  Below i have just added the key parts for my example:
     
    #define _XTAL_FREQ 32000000
     
    CLK_HIGH
    __delay_us(5)
    CLK_LOW
    __delay_us(5)
     
     
    Feel free to pass any comments.
     
    Regards,
     
    Tuurbo46
     
     
     
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    qhb
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    Re: 18F4431 I2C SSPCON2 2019/01/17 03:37:11 (permalink)
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    Yes. You're on the right path.
    Remember that 100kHz is just a maximum speed, you can run any speed you like which is slower than that.
     
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