PIC32MZ - Turning on ADC causes system reset.

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2018/12/06 10:27:45 (permalink)
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PIC32MZ - Turning on ADC causes system reset.

This is the first time I started using the PIC32s. For the last 7 years I've been developing with the PIC24/dsPIC33 series.
I'm using the PIC32MZ1024EFH064 Rev A. on the "Mini-32 PIC32MZ" development board from Mikroe.  24Mhz Clock input. Using the Pickit3 to program. MPLABX 5.10 and XC32 2.10
 
Problem:
As soon as the ADCCONbits.ON is set the chip does a reset.  I've tried using different sample code to initialize the ADC from the reference manual, online forums. and Harmony but the same thing happens. When debugging with the pickit3 the following bits are set at reset after trying to turn on the ADC: BCFGERR, BOR, POR, EXTR.
I've enabled all the exception handlers but they don't catch anything.
I have been able to get the ADC to turn with out causing a reset setting a breakpoint before the ADCCONbits.ON = 1 instruction and forcing the ADCCON register to 0xFFFFFFFF through the debugger. Then the ADC will start and I have no device reset, but the configuration values are not what I want. If i do that procedure through code I get a reset.
 
I know the chip is functioning fine otherwise because the UART, OC and Timer devices are operating as they should. Any help or suggestions would be appreciated. I've tried this on two different dev boards so I'm sure it is a code problem.
 
Attached is the code for the ADC Init

void Init_ADC(){


TRISBbits.TRISB15 = 1;
TRISGbits.TRISG6 = 1;
TRISBbits.TRISB2 = 1;

ANSELBbits.ANSB14 = 1;
ANSELBbits.ANSB2 = 1;
ANSELGbits.ANSG6 = 1;

ADC0CFG = DEVADC0;
ADC1CFG = DEVADC1; // Copy the configuration data to the AD1CALx special function registers.
ADC2CFG = DEVADC2;
ADC3CFG = DEVADC3;
ADC4CFG = DEVADC4;
ADC7CFG = DEVADC7;


//ADCCON1bits.ON = 1;
/* Configure ADCCON1 */
//ADCCON1 = 0; // No ADCCON1 features are enabled including: Stop-in-Idle, turbo,
// CVD mode, Fractional mode and scan trigger source.
ADCCON1bits.SELRES = 3; // ADC7 resolution is 12 bits
ADCCON1bits.STRGSRC = 1; // Select scan trigger.
/* Configure ADCCON2 */
ADCCON2bits.SAMC = 5; // ADC7 sampling time = 5 * TAD7
ADCCON2bits.ADCDIV = 1; // ADC7 clock freq is half of control clock = TAD7
/* Initialize warm up time register */
ADCANCON = 0;


ADCANCONbits.WKUPCLKCNT = 9; // Wakeup exponent = 512 * TADx



/* Clock setting */
ADCCON3bits.ADCSEL = 0; // Select input clock source
ADCCON3bits.CONCLKDIV = 0; // Control clock frequency is half of input clock
ADCCON3bits.VREFSEL = 0; // Select AVDD and AVSS as reference source
ADC2TIMEbits.ADCDIV = 1; // ADC2 clock frequency is half of control clock = TAD0
ADC2TIMEbits.SAMC = 5; // ADC2 sampling time = 5 * TAD0
ADC2TIMEbits.SELRES = 3; // ADC2 resolution is 12 bits
/* Select analog input for ADC modules, no presync trigger, not sync sampling */
ADCTRGMODEbits.SH2ALT = 0; // ADC2 = AN2
/* Select ADC input mode */
ADCIMCON1bits.SIGN2 = 0; // unsigned data format
ADCIMCON1bits.DIFF2 = 0; // Single ended mode
ADCIMCON1bits.SIGN10 = 0; // unsigned data format
ADCIMCON1bits.DIFF10 = 0; // Single ended mode
ADCIMCON1bits.SIGN14 = 0; // unsigned data format
ADCIMCON1bits.DIFF14 = 0; // Single ended mode
/* Configure ADCGIRQENx */
ADCGIRQEN1 = 0; // No interrupts are used.
ADCGIRQEN2 = 0;
/* Configure ADCCSSx */
ADCCSS1 = 0; // Clear all bits
ADCCSS2 = 0;
ADCCSS1bits.CSS2 = 1; // AN0 (Class 1) set for scan
ADCCSS1bits.CSS10 = 1; // AN8 (Class 2) set for scan
ADCCSS1bits.CSS14 = 1; // AN40 (Class 3) set for scan
/* Configure ADCCMPCONx */
ADCCMPCON1 = 0; // No digital comparators are used. Setting the ADCCMPCONx
ADCCMPCON2 = 0; // register to '0' ensures that the comparator is disabled.
ADCCMPCON3 = 0; // Other registers are ‘don't care’.
ADCCMPCON4 = 0;
ADCCMPCON5 = 0;
ADCCMPCON6 = 0;
/* Configure ADCFLTRx */
ADCFLTR1 = 0; // No oversampling filters are used.
ADCFLTR2 = 0;
ADCFLTR3 = 0;
ADCFLTR4 = 0;
ADCFLTR5 = 0;
ADCFLTR6 = 0;

/* Set up the trigger sources */
ADCTRG1bits.TRGSRC0 = 3; // Set AN0 (Class 1) to trigger from scan source
ADCTRG3bits.TRGSRC10 = 3; // Set AN8 (Class 2) to trigger from scan source

// AN40 (Class 3) always uses scan trigger source
/* Early interrupt */
ADCEIEN1 = 0; // No early interrupt
ADCEIEN2 = 0;
/* Turn the ADC on */
CFGCONbits.IOANCPEN = 0;
ADCCON1bits.AICPMPEN = 0;

Nop();
Nop();
Nop();


ADCCON1bits.ON = 1;
 //Code crashes here. when stepping through the assembly the device resets as soon as the ADCCON register is written to.

/* Wait for voltage reference to be stable */
while(!ADCCON2bits.BGVRRDY); // Wait until the reference voltage is ready
while(ADCCON2bits.REFFLT); // Wait if there is a fault with the reference voltage
/* Enable clock to analog circuit */
ADCANCONbits.ANEN2 = 1; // Enable the clock to analog bias ADC0
ADCANCONbits.ANEN7 = 1; // Enable, ADC7
/* Wait for ADC to be ready */
while(!ADCANCONbits.WKRDY2); // Wait until ADC0 is ready
while(!ADCANCONbits.WKRDY7); // Wait until ADC7 is ready
/* Enable the ADC module */
ADCCON3bits.DIGEN2 = 1; // Enable ADC0
ADCCON3bits.DIGEN7 = 1; // Enable ADC7

}

 
And my configuration bits

// DEVCFG3
#pragma config USERID = 0x1234 // Enter Hexadecimal value (Enter Hexadecimal value)
#pragma config FMIIEN = ON // Ethernet RMII/MII Enable (MII Enabled)
#pragma config FETHIO = ON // Ethernet I/O Pin Select (Default Ethernet I/O)
#pragma config PGL1WAY = OFF // Permission Group Lock One Way Configuration (Allow multiple reconfigurations)
#pragma config PMDL1WAY = OFF // Peripheral Module Disable Configuration (Allow multiple reconfigurations)
#pragma config IOL1WAY = OFF // Peripheral Pin Select Configuration (Allow multiple reconfigurations)
#pragma config FUSBIDIO = OFF // USB USBID Selection (Controlled by Port Function)
// DEVCFG2
#pragma config FPLLIDIV = DIV_3 // System PLL Input Divider (3x Divider)
#pragma config FPLLRNG = RANGE_5_10_MHZ // System PLL Input Range (5-10 MHz Input)
#pragma config FPLLICLK = PLL_POSC // System PLL Input Clock Selection (POSC is input to the System PLL)
#pragma config FPLLMULT = MUL_50 // System PLL Multiplier (PLL Multiply by 50)
#pragma config FPLLODIV = DIV_2 // System PLL Output Clock Divider (2x Divider)
#pragma config UPLLFSEL = FREQ_24MHZ // USB PLL Input Frequency Selection (USB PLL input is 24 MHz)
// DEVCFG1
#pragma config FNOSC = SPLL // Oscillator Selection Bits (Primary Osc (HS,EC))
#pragma config DMTINTV = WIN_127_128 // DMT Count Window Interval (Window/Interval value is 127/128 counter value)
#pragma config FSOSCEN = OFF // Secondary Oscillator Enable (Disable SOSC)
#pragma config IESO = OFF // Internal/External Switch Over (Disabled)
#pragma config POSCMOD = EC // Primary Oscillator Configuration (External clock mode)
#pragma config OSCIOFNC = OFF // CLKO Output Signal Active on the OSCO Pin (Disabled)
#pragma config FCKSM = CSECME // Clock Switching and Monitor Selection (Clock Switch Enabled, FSCM Enabled)
#pragma config WDTPS = PS1048576 // Watchdog Timer Postscaler (1:1048576)
#pragma config WDTSPGM = STOP // Watchdog Timer Stop During Flash Programming (WDT stops during Flash programming)
#pragma config WINDIS = NORMAL // Watchdog Timer Window Mode (Watchdog Timer is in non-Window mode)
#pragma config FWDTEN = OFF // Watchdog Timer Enable (WDT Disabled)
#pragma config FWDTWINSZ = WINSZ_25 // Watchdog Timer Window Size (Window size is 25%)
#pragma config DMTCNT = DMT31 // Deadman Timer Count Selection (2^31 (2147483648))
#pragma config FDMTEN = OFF // Deadman Timer Enable (Deadman Timer is disabled)
// DEVCFG0
#pragma config DEBUG = OFF // Background Debugger Enable (Debugger is disabled)
#pragma config JTAGEN = ON // JTAG Enable (JTAG Disabled)
#pragma config ICESEL = ICS_PGx1 // ICE/ICD Comm Channel Select (Communicate on PGEC2/PGED2)
#pragma config TRCEN = ON // Trace Enable (Trace features in the CPU are enabled)
#pragma config BOOTISA = MIPS32 // Boot ISA Selection (Boot code and Exception code is MIPS32)
#pragma config FECCCON = OFF_UNLOCKED // Dynamic Flash ECC Configuration (ECC and Dynamic ECC are disabled (ECCCON bits are writable))
#pragma config FSLEEP = OFF // Flash Sleep Mode (Flash is powered down when the device is in Sleep mode)
#pragma config DBGPER = PG_ALL // Debug Mode CPU Access Permission (Allow CPU access to all permission regions)
#pragma config SMCLR = MCLR_NORM // Soft Master Clear Enable bit (MCLR pin generates a normal system Reset)
#pragma config SOSCGAIN = GAIN_2X // Secondary Oscillator Gain Control bits (2x gain setting)
#pragma config SOSCBOOST = ON // Secondary Oscillator Boost Kick Start Enable bit (Boost the kick start of the oscillator)
#pragma config POSCGAIN = GAIN_2X // Primary Oscillator Gain Control bits (2x gain setting)
#pragma config POSCBOOST = ON // Primary Oscillator Boost Kick Start Enable bit (Boost the kick start of the oscillator)
#pragma config EJTAGBEN = NORMAL // EJTAG Boot (Normal EJTAG functionality)
// DEVCP0
#pragma config CP = OFF // Code Protect (Protection Disabled)

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