Is looking for interrupts the only way to identify the end of CRC calculation?
You don't actually have to enable the interrupt. You can simply test the flag in a loop after you have written everything to the CRC FIFO.
One concern with relying on the interrupt flag is this:
From the FRM
The CRCIF flag may get set in the middle of a data process sequence if the data is
not provided to the CRC module in time and the CRC FIFO becomes empty.
So, don't just clear the interrupt flag at the beginning of the loop where you write to the FIFO and test the flag after exiting the loop. (Since, depending on loop overhead and other external conditions---like other interrupts that occur during your CRC routine, the flag may get set somewhere in the loop before the last word.)
Make sure you clear the interrupt flag immediately
upon writing the last byte, then wait for the interrupt flag to be set before reading out the calculated CRC.
One reliable way that doesn't depend on the interrupt flag:
After you send the last data word/byte to the FIFO, wait for FIFO to be empty, then execute a sufficient number of NOP instructions for the shifting to be complete. Since the CRC shifter operates twice as fast as the instruction clock, then, for example with a data width of 8 bits, give it four NOPs (8/2= 4)
I doubt that this wastes any more cycles than setting up a loop to test the interrupt flag. (And if your application can't survive a couple of possibly superfluous NOPs in the CRC routine, you are pretty much doomed anyhow, right?)
post edited by davekw7x - 2018/10/29 11:18:11