PIC32MZ one timer won't initialize [SOLVED]

MPLAB X IDE v4.15, Compiler 2.10, Harmony 2.06
Starter Kit DM320010, PIC32MZ DA
 
I was modifying the PMP_LCD example and i want to to add a second timer.
 
Here is the timer section of the MHC file:
 
CONFIG_USE_DRV_TMR=y
CONFIG_DRV_TMR_DRIVER_MODE="DYNAMIC"
CONFIG_DRV_TMR_CLIENTS_NUMBER=1
CONFIG_DRV_TMR_INTERRUPT_MODE=y
CONFIG_DRV_TMR_INSTANCES_NUMBER=2
#
# from $HARMONY_VERSION_PATH\framework\driver\tmr\config\drv_tmr_idx_pic32m.ftl
#
CONFIG_DRV_TMR_INST_0=y
CONFIG_DRV_TMR_PERIPHERAL_ID_IDX0="TMR_ID_1"
CONFIG_DRV_TMR_INTERRUPT_PRIORITY_IDX0="INT_PRIORITY_LEVEL1"
CONFIG_DRV_TMR_INTERRUPT_SUB_PRIORITY_IDX0="INT_SUBPRIORITY_LEVEL0"
CONFIG_DRV_TMR_CLOCK_SOURCE_1_IDX0="DRV_TMR_CLKSOURCE_INTERNAL"
CONFIG_DRV_TMR_PRESCALE_IDX0="TMR_PRESCALE_VALUE_256"
CONFIG_DRV_TMR_ASYNC_WRITE_ENABLE_IDX0=n
CONFIG_DRV_TMR_POWER_STATE_IDX0="SYS_MODULE_POWER_RUN_FULL"
CONFIG_DRV_TMR_INST_1=y
CONFIG_DRV_TMR_PERIPHERAL_ID_IDX1="TMR_ID_2"
CONFIG_DRV_TMR_INTERRUPT_PRIORITY_IDX1="INT_PRIORITY_LEVEL1"
CONFIG_DRV_TMR_INTERRUPT_SUB_PRIORITY_IDX1="INT_SUBPRIORITY_LEVEL0"
CONFIG_DRV_TMR_CLOCK_SOURCE_3_IDX1="DRV_TMR_CLKSOURCE_INTERNAL"
CONFIG_DRV_TMR_PRESCALE_IDX1="TMR_PRESCALE_VALUE_256"
CONFIG_DRV_TMR_OPERATION_MODE_IDX1="DRV_TMR_OPERATION_MODE_16_BIT"
CONFIG_DRV_TMR_ASYNC_WRITE_ENABLE_IDX1=n
CONFIG_DRV_TMR_POWER_STATE_IDX1="SYS_MODULE_POWER_RUN_FULL"
 
This is from system_config.h,  looks good so far.... 
 

/*** Timer Driver Configuration ***/
#define DRV_TMR_INTERRUPT_MODE true
#define DRV_TMR_INSTANCES_NUMBER 2
#define DRV_TMR_CLIENTS_NUMBER 1

/*** Timer Driver 0 Configuration ***/
#define DRV_TMR_PERIPHERAL_ID_IDX0 TMR_ID_1
#define DRV_TMR_INTERRUPT_SOURCE_IDX0 INT_SOURCE_TIMER_1
#define DRV_TMR_INTERRUPT_VECTOR_IDX0 INT_VECTOR_T1
#define DRV_TMR_ISR_VECTOR_IDX0 _TIMER_1_VECTOR
#define DRV_TMR_INTERRUPT_PRIORITY_IDX0 INT_PRIORITY_LEVEL1
#define DRV_TMR_INTERRUPT_SUB_PRIORITY_IDX0 INT_SUBPRIORITY_LEVEL0
#define DRV_TMR_CLOCK_SOURCE_IDX0 DRV_TMR_CLKSOURCE_INTERNAL
#define DRV_TMR_PRESCALE_IDX0 TMR_PRESCALE_VALUE_256
#define DRV_TMR_OPERATION_MODE_IDX0 DRV_TMR_OPERATION_MODE_16_BIT
#define DRV_TMR_ASYNC_WRITE_ENABLE_IDX0 false
#define DRV_TMR_POWER_STATE_IDX0 SYS_MODULE_POWER_RUN_FULL

#define DRV_TMR_PERIPHERAL_ID_IDX1 TMR_ID_2
#define DRV_TMR_INTERRUPT_SOURCE_IDX1 INT_SOURCE_TIMER_2
#define DRV_TMR_INTERRUPT_VECTOR_IDX1 INT_VECTOR_T2
#define DRV_TMR_ISR_VECTOR_IDX1 _TIMER_2_VECTOR
#define DRV_TMR_INTERRUPT_PRIORITY_IDX1 INT_PRIORITY_LEVEL1
#define DRV_TMR_INTERRUPT_SUB_PRIORITY_IDX1 INT_SUBPRIORITY_LEVEL0
#define DRV_TMR_CLOCK_SOURCE_IDX1 DRV_TMR_CLKSOURCE_INTERNAL
#define DRV_TMR_PRESCALE_IDX1 TMR_PRESCALE_VALUE_256
#define DRV_TMR_OPERATION_MODE_IDX1 DRV_TMR_OPERATION_MODE_16_BIT

#define DRV_TMR_ASYNC_WRITE_ENABLE_IDX1 false
#define DRV_TMR_POWER_STATE_IDX1 SYS_MODULE_POWER_RUN_FULL

 // **********************************************************************

 
This is from system_init.c
 

/*** TMR Driver Initialization Data ***/

const DRV_TMR_INIT drvTmr0InitData =
{
    .moduleInit.sys.powerState = DRV_TMR_POWER_STATE_IDX0,
    .tmrId = DRV_TMR_PERIPHERAL_ID_IDX0,
    .clockSource = DRV_TMR_CLOCK_SOURCE_IDX0,
    .prescale = DRV_TMR_PRESCALE_IDX0,
    .mode = DRV_TMR_OPERATION_MODE_16_BIT,
    .interruptSource = DRV_TMR_INTERRUPT_SOURCE_IDX0,
    .asyncWriteEnable = false,
};
const DRV_TMR_INIT drvTmr1InitData =
{
    .moduleInit.sys.powerState = DRV_TMR_POWER_STATE_IDX1,
    .tmrId = DRV_TMR_PERIPHERAL_ID_IDX1,
    .clockSource = DRV_TMR_CLOCK_SOURCE_IDX1,
    .prescale = DRV_TMR_PRESCALE_IDX1,
    .mode = DRV_TMR_OPERATION_MODE_IDX1,
    .interruptSource = DRV_TMR_INTERRUPT_SOURCE_IDX1,
    .asyncWriteEnable = false,


/*** TMR Service Initialization Data ***/
const SYS_TMR_INIT sysTmrInitData =
{
    .moduleInit = {SYS_MODULE_POWER_RUN_FULL},
    .drvIndex = DRV_TMR_INDEX_0,
    .tmrFreq = 1000, 
};


void SYS_Initialize ( void* data )
{
    /* Core Processor Initialization */
    SYS_CLK_Initialize( NULL );
    SYS_DEVCON_Initialize(SYS_DEVCON_INDEX_0, (SYS_MODULE_INIT*)NULL);
    SYS_DEVCON_PerformanceConfig(SYS_CLK_SystemFrequencyGet());

    /* Board Support Package Initialization */
    BSP_Initialize(); 

    /* Initialize Drivers */


    /*Initialize PMP0 */
    DRV_PMP0_Initialize();
    DRV_PMP0_ModeConfig();

    /* Disable SDHC module */
 PLIB_POWER_PeripheralModuleDisable(POWER_ID_0, POWER_MODULE_SDHC);

    sysObj.drvTmr0 = DRV_TMR_Initialize(DRV_TMR_INDEX_0, (SYS_MODULE_INIT *)&drvTmr0InitData);
    sysObj.drvTmr1 = DRV_TMR_Initialize(DRV_TMR_INDEX_1, (SYS_MODULE_INIT *)&drvTmr1InitData);


    SYS_INT_VectorPrioritySet(INT_VECTOR_T1, INT_PRIORITY_LEVEL1);
    SYS_INT_VectorSubprioritySet(INT_VECTOR_T1, INT_SUBPRIORITY_LEVEL0);
    SYS_INT_VectorPrioritySet(INT_VECTOR_T2, INT_PRIORITY_LEVEL1);
    SYS_INT_VectorSubprioritySet(INT_VECTOR_T2, INT_SUBPRIORITY_LEVEL0);
 
 
     sysObj.drvUsart0 = DRV_USART_Initialize(DRV_USART_INDEX_0, (SYS_MODULE_INIT *)&drvUsart0InitData);
    SYS_INT_VectorPrioritySet(INT_VECTOR_UART2_TX, INT_PRIORITY_LEVEL1);
    SYS_INT_VectorSubprioritySet(INT_VECTOR_UART2_TX, INT_SUBPRIORITY_LEVEL0);
    SYS_INT_VectorPrioritySet(INT_VECTOR_UART2_RX, INT_PRIORITY_LEVEL1);
    SYS_INT_VectorSubprioritySet(INT_VECTOR_UART2_RX, INT_SUBPRIORITY_LEVEL0);
    SYS_INT_VectorPrioritySet(INT_VECTOR_UART2_FAULT, INT_PRIORITY_LEVEL1);
    SYS_INT_VectorSubprioritySet(INT_VECTOR_UART2_FAULT, INT_SUBPRIORITY_LEVEL0);

    /* Initialize System Services */
    SYS_PORTS_Initialize();
    sysObj.sysConsole0 = SYS_CONSOLE_Initialize(SYS_CONSOLE_INDEX_0, (SYS_MODULE_INIT *)&consUsartInit0);


    /*** Debug Service Initialization Code ***/
    sysObj.sysDebug = SYS_DEBUG_Initialize(SYS_DEBUG_INDEX_0, (SYS_MODULE_INIT*)&debugInit);

    /*** Interrupt Service Initialization Code ***/
    SYS_INT_Initialize();

    /*** TMR Service Initialization Code ***/
    sysObj.sysTmr = SYS_TMR_Initialize(SYS_TMR_INDEX_0, (const SYS_MODULE_INIT * const)&sysTmrInitData);

    /* Initialize Middleware */

    /* Enable Global Interrupts */
    SYS_INT_Enable();

    /* Initialize the Application */
    APP_Initialize();
}

 
Timer 2  (DRV_TMR_PERIPHERAL_ID_IDX1,  TMR_ID_2) works just fine as a delay in the code (it was already in the code):
 

void Delay_ms(unsigned int x)
{
    PLIB_TMR_Counter16BitClear(TMR_ID_2); /* Clear the timer */
// while (PLIB_TMR_Counter16BitGet(TMR_ID_2) < (40 * x)); /* 40 Timer 1 ticks = ~1ms */
    while (PLIB_TMR_Counter16BitGet(TMR_ID_2) < (ONE_MS_DIVIDER * x)); /* ONE_MS_DIVIDER Timer 1 ticks = ~1ms */
}

 
I wanted a second timer and when I modified MHC to a second time it gave me (DRV_TMR_PERIPHERAL_ID_IDX0, TMR_ID_1)
 
I decide to check the control registers this way:
printf("T1CON=0x%x\n\r",T1CON);
printf("T2CON=0x%x\n\r",T2CON);
etc.
and got:
T1CON=0x0
T2CON=0x8070  (exactly what I expected)
T3CON thru T9CON were all 0x0.
 
1 & 2 were both initialized the same way, why isn't T1CON filled similarly?
 
While I am here, I modified the timer interrupts like this by adding a flag and I never see the flag get set.  

void __ISR(_TIMER_1_VECTOR, ipl1AUTO) IntHandlerDrvTmrInstance0(void)
{
    gbTmr1_Int_Flag=1;
    DRV_TMR_Tasks(sysObj.drvTmr0);
}
void __ISR(_TIMER_2_VECTOR, ipl1AUTO) IntHandlerDrvTmrInstance1(void)
{
    gbTmr2_Int_Flag=1;
    DRV_TMR_Tasks(sysObj.drvTmr1);
}

 
Here is the code I used to monitor the states, I initialized the :

 
 
           
 
DRV_TMR_CounterValueSet(TMR_ID_1, 65530 );
 mn16_Tmr1_Value=PLIB_TMR_Counter16BitGet(TMR_ID_1);
 printf("Timer1 Value %d\n\r",mn16_Tmr1_Value);
 DRV_TMR_CounterValueSet(TMR_ID_2, 65530 );
 mn16_Tmr2_Value=PLIB_TMR_Counter16BitGet(TMR_ID_2);
 printf("Timer2 Value %d\n\r",mn16_Tmr2_Value);
 
 
 
while(mbWhileState)
            {
                PLIB_PORTS_PinToggle(PORTS_ID_0, PORT_CHANNEL_H, PORTS_BIT_POS_15);
                if(gbTmr1_Int_Flag==1) printf("Timer1 flag set.\r\n");
                if(gbTmr2_Int_Flag==1) printf("Timer2 flag set.\r\n");
                //Delay_ms(100);
            }

 
Interestingly when I look at the timer values:
Timer 1 is 0 which it implies it counted and stopped
Timer 2 is 6795 which implies it wrapped.
 
-Pete