18F27/47K42 wrong generated = PROBLEM SOLVED :)
18F27/47K42 wrong generated signals on same port B
hello colleagues, I would like to congratulate you on the outstanding work on making the processor on my assignment - 18F47k42-8192 SRAM. the processor is extremely good as the rest of the same family. we already have several units and tested the new 40-pin version.
my fellow programmers are impressed with your work. we also installed MPLAB-5.00 and xc8-2.00. we also used the configurator code to activate the peripheral modules of the CPU, because as we have learned, the old PLIBs are no longer working.
the processor is tested on a high-frequency circuit and software that allows you to see the port logic analyzer's work.
here's what I can show you. I'm sending you some logical analyzer charts, to which I clearly highlighted red and green where the problem is and how we solved it.
I will give some clarification. we've set PORT B to work in a certain way by generating signals with a maximum CPU frequency of 64MHZ. quartz resonator is 16 + PLL = 64Mhz. gate is set only on digital outputs, there is no peripheral to this port, just digital outputs with frequency. as a basic configuration, the CPU is only set to work with an external generator without any additional extras from the fuses. all outputs are digital on all ports, there are no other peripheral devices, built-in protocols, or other hardware extras.
as is clear from the first graph with the wrong signal from output RB5, the generated signal has missed impulses in the generation. the signal is also inverted as a constant logic 1, and the gate is reset in 0 shortly after command by the processor. this is a wrong signal generated by both pulse count and 0/1. the graph shows that the signal has gaps in the generated impulses and quite a lot. also the signal is inverted, being in constant 1, and the pulse resets in 0 it briefly and then again makes it in logic 1.
on the following graph I have shown how the generated signal should look like, but this output has been replaced with the output of port RC0. I decided to try to move the exit to see if there was any improvement. it turned out that the generated signal from port C is correct and the controller correctly manages the external peripheral equipment connected to it.
as shown in the generator signal graph, the generated signal has a full number of impulses during operation and is no longer inverted. from normal zero 0 is briefly in logic 1 and then returns to zero 0 as it is written in the processor code.
just to tell you that in the previous version of the controller we used the 18F46K20 processor. there is the same problem, so the front gate gate has been shifted to RC2 as in this variant.
the circuit has two control ports, and because the signals from the different frequency generations have been collapsed, we have separated the separate ports to send separate signals to the managed equipment.
on the project we are working on in the previous version with 46k20 and in this version with 47k42 are enough to implement the scheme 28 pins processors with generation of signals from one port. but after we noticed that there was a brawl of signals during a generation at the gate, we decided to split the ports into two separate ones, and that's why we use 40 pin processors.
as shown by your processors, the ones I have used so far have not had any serious low frequency problems. e.g., 4,8,16MHz. but now at 64MHz there is a problem that will have to be investigated by you and removed.
I know that in any processor, as it is said at any time and on each PORT and pin, any output digital signal can be generated independently of the outputs generated on the other outputs of the same port.
so on the same port, any pin can generate a digital output signal without disturbing the digital signal of the neighboring pin of the same port. or as it is right for each pins to know the signal without interfering with the next pin beside it.
I suppose the problem may be in the electronic module on the final stage of a port and / or all ports. may be in the PLL module and only occur at high frequencies. it may only appear when the software is set to have digital outputs and / or in combination with a high frequency from the gatherer. many options are possible. e.g., a specified command in the microcode that fails to execute, and / or any one of the logic that responds to this command at a high frequency fails to execute the command. or not, and reaches the reaction time, and for that, it misses the impulses, and then begins generating again.
I'm sure you will find the problem, as I said, the 47k42 processor is extremely good and will serve us for many things in electronics.
before making this 47k42-8192 SRAM model as well as the whole family, we used 4620 and 46k20 at low frequencies up to 16 MHz there were no problems, everything worked. I am very pleased with both. now we have a problem with this problem with the ports, but we have found a solution. it costs us almost nothing, only a few samples of different variants. there is not much difference in the price of the 28-pin and 40-pin processor, as well as in the software and PCB modification. but I'm glad if I'm right and I've found a problem that you're going to handle. I am sure.
the new processor with the increased memory frame 8192 has greatly helped our electronics. as I wrote you in the previous letter, I expect you to increase the memory of the other 18F, 18F ___ K ___, 18F__J__ families. especially those processors that have a 28,40,64,80 and 100 pin housing. for example, I will give the 18F87K22 processor, which is very powerful and good, but this little memory frame can not be fully used.
I will give only one example. there are processors that have an example 64 pin housing. there are many ADC ports, serial ports, many peripherals, and RAM memory only 4096 or even less. the processors are 16 MIPS, extremely fast, powerful and rich in peripherals, and with this little memory frame 4096 or 3886 you are crippling them. Nowadays, there are good graphical displays made with enough large size touch screen screens, there are pretty good and accurate sensors of any kind for analog and digital measurement of dimensions, there are all communication modules for wired and wireless communication. but with 4096 and / or fewer memory frames, we can not trigger these mods even when the processor is 64 or 80 pin.
I need my RAM memory and I think 8192k is just as much for this architecture of all the 18F_______ families
for now is this, I want to tell you once again that you are super as a company to thank you for listening to me to increase the memory of this processor and I'm sure you will find a solution to the problem.
if I need to send you the code of the function that activates this error, as well as the CPU configuration files.
also if you need some other information from us on this issue you can rely on us.
best regards - Kaloyan Radev and my team of programmers :)
P.S. in red picture corect port is PORT B, my mistake in photoshop text typing :)
post edited by karadev - 2018/08/14 12:26:48