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Hot!I2C for PIC32MZ in HarmonyV20501

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Paul PortSol
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2018/04/03 08:14:02 (permalink)
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I2C for PIC32MZ in HarmonyV20501

I2C for PIC32MZ2048EFM in HarmonyV20501
- Had issues in I2C with Hardware Implementation 
- Got stuck after reading several chunks of 256 bytes from a DS3232M+ RTC
- DRV_I2C_TransferStatusGet() returning continuous DRV_I2C_BUFFER_MASTER_ACK_SEND
- I2C vSDA was held low
- Seem to be corrected by enabling BitBang under I2C in MHCv2052 (I left as default 50KHz)
- Pins are still configured as SCL and SDA (not GPIO)
-- Bonus: Can control SCL by simply setting as Output, then restore to input after done (No need to De-initialize I2C as in HW I2C implementation)(need to control SCL to clear SDA if DS3232M+ has incomplete read due to a reset - See DS3232M+ datasheet)
- works for now :)
 
If anyone has warnings about using Harmony I2C BitBang please let us know (especially with PIC32MZ).
 
Using:
HarmonyV20501
MHCv2052
XC32v205
MPLABXv415
PIC32MZ2048EFM144
 
Paul
 
#1

3 Replies Related Threads

    iggardo
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    Re: I2C for PIC32MZ in HarmonyV20501 2020/07/23 23:46:12 (permalink)
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    Hi all.
    Sorry for posting in an old thread, but I am suffering exactly the same issue as described by Paul, but in a different PIC and Harmony Version.

    In my case:
    HarmonyV206
    MHCv206
    XC32v205
    MPLABXv525
    PIC32MX795F512L

    The problem only appears on reading operations when I2C frequency is closer to 400kHz. No matter if Slew Rate Control is enabled or not. All the I2C buses of the PIC are affected.

    Harmony I2C stack get stuck after reading external devices like I2C eeproms, RTCs, or other PICs in salve role.

    As Paul said:
    - DRV_I2C_TransferStatusGet() returning continuous DRV_I2C_BUFFER_MASTER_ACK_SEND
    - I2C vSDA was held low

    Lowering freq. to for example 300kHz solves the problem.
    Enabling BitBang also solves the problem, but max freq is about 100kHz

    Se attached screen capture from scope.
    Please note the 9h pulse of the clock signal on write operations.
    I think I2C harmony takes so long in generating ACK condition that diver get stuck.
    The 9th pulse on read operations look fine.

    Any suggestion will be appreciated.

    Regards.

    Attached Image(s)

    #2
    LaszloB
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    Re: I2C for PIC32MZ in HarmonyV20501 2020/08/04 23:34:20 (permalink)
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    View in errata!
    Example: "I2C3 on the A3 revision is non functional"
    #3
    iggardo
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    Re: I2C for PIC32MZ in HarmonyV20501 2020/08/04 23:47:49 (permalink)
    5 (1)
    Thank you LaszloB.
     
    I'm currently using rev A5, and problem appears on buses I2C2 I2C3 and I2C5, not only I2C3.

    About the 9th pulse of the clock signal been 'late' on write operations, may be related with slaves with "clock stretching" feature enabled.
     
    post edited by iggardo - 2020/08/04 23:49:15
    #4
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