Re: TMR1 interrupt seems to trigger too early
Your ISR compiled with XC8 in free mode has close to 50 cycles latency due to all the context saving, but that is a far cry from 2000. But even a small latency will eventually cause the problem you are seeing, so you need to have some mechanism to handle it.
If the code you haven't shown is disabling interrupts for a time, that could exacerbate this. Or writing/erasing Flash (as peripherals continue while code execution freezes) .
Can't remember. I've slept since then - Mark