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Hot!TWo PIC 18f4620 , one as master & the second is slave I2C communication problem

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ubuntuman
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Re: TWo PIC 18f4620 , one as master & the second is slave I2C communication problem 2017/11/13 10:20:04 (permalink)
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DarioG
May I suggest a different approach?
 
I.e. can you try your MAster code with a known slave device, such as a TC74 temperature sensor or a 24xx1025 memory? You can get them for free by Microchip.
 
This way you would get something that works , and move on from that.


rodims
 [deleted, due to nonsense]
running out of ideas ...
 
edit: Btw, Proteus has an i2c Debugger component, but not sure whether this will help ubuntman.
Ideally this would allow test the master and the slave separately. I read that the component can replace the master,- not sure about the slave.


If any of u know a protues I2C slave device that  i can use it for testing that master please enlighten me with it 


#81
DarioG
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Re: TWo PIC 18f4620 , one as master & the second is slave I2C communication problem 2017/11/13 10:23:47 (permalink)
+1 (1)
I would never trust a I2C simulator (with all due respect to Proteus... wink )

GENOVA :D :D ! GODO
#82
ubuntuman
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Re: TWo PIC 18f4620 , one as master & the second is slave I2C communication problem 2017/11/13 10:51:10 (permalink)
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so should i surrender and close the topic or where else may i have some help ? 
#83
DarioG
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Re: TWo PIC 18f4620 , one as master & the second is slave I2C communication problem 2017/11/13 10:57:52 (permalink)
+1 (1)
Make real hardware, get TC74...

GENOVA :D :D ! GODO
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DarioG
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Re: TWo PIC 18f4620 , one as master & the second is slave I2C communication problem 2017/11/13 10:59:15 (permalink)
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Also, I'd suggest make a I2C Master in software and use it as a starting point. It's easier...

GENOVA :D :D ! GODO
#85
ubuntuman
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Re: TWo PIC 18f4620 , one as master & the second is slave I2C communication problem 2017/11/13 11:07:51 (permalink)
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DarioG
Make real hardware, get TC74...


what u may not notice is that i use simulator and hardware too . this schematic of the bitmap file i upload before i have it in real and i download the code for both master and slave but i get the same result general call zero . address match interrupt zero start stop interrupts work fine . simulation and hardware results are matched here https://imgur.com/Jx3c65z
#86
DarioG
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Re: TWo PIC 18f4620 , one as master & the second is slave I2C communication problem 2017/11/13 11:10:52 (permalink)
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I see,
but I was telling you to use a "real" normal slave device, so that you can test the Master first, properly.

GENOVA :D :D ! GODO
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ubuntuman
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Re: TWo PIC 18f4620 , one as master & the second is slave I2C communication problem 2017/11/13 18:11:51 (permalink)
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if i am not mistaken i guess i found something 

17.4.10 I2C MASTER MODE TRANSMISSION
Transmission of a data byte, a 7-bit address or the
other half of a 10-bit address is accomplished by simply
writing a value to the SSPBUF register. This action will
set the Buffer Full flag bit, BF and allow the Baud Rate
Generator to begin counting and start the next
transmission. Each bit of address/data will be shifted
out onto the SDA pin after the falling edge of SCL is
asserted (see data hold time specification
parameter 106). SCL is held low for one Baud Rate
Generator rollover count (TBRG). Data should be valid
before SCL is released high (see data setup time
specification parameter 107). When the SCL pin is
released high, it is held that way for TBRG. The data on
the SDA pin must remain stable for that duration and
some hold time after the next falling edge of SCL. After
the eighth bit is shifted out (the falling edge of the eighth
clock), the BF flag is cleared and the master releases
SDA.

i get this  from datasheet look to the next screenshot in the link 
this first screen for the not ack signal https://imgur.com/T8R74GL
 
this screen for one of the data signal https://imgur.com/HcRLZ1a
 
check them both and check the quote above of the datasheet about the transmission and tell me ur notes  pls 
#88
qhb
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Re: TWo PIC 18f4620 , one as master & the second is slave I2C communication problem 2017/11/13 18:19:57 (permalink)
+1 (1)
No labels on the graphs.
No description of what you expected to see, and what you think is relevant.
Now I think you're just being lazy.
I don't see anything in that text that goes against what you've already been told.
 
#89
ubuntuman
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Re: TWo PIC 18f4620 , one as master & the second is slave I2C communication problem 2017/11/14 03:56:13 (permalink)
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qhb
No labels on the graphs.
No description of what you expected to see, and what you think is relevant.
Now I think you're just being lazy.
I don't see anything in that text that goes against what you've already been told.
 


In the text they say that data bit should be ready while clock bit is 0 and before it turns to 1 then it should stay steady after the clock bit goes to 0 alittle time then the next data bit is going to be prepared same as the previous data bit one . the only data bit who goes according to that description is the ackwonledge bit the rest of data bits starts to be ready while clokc bit is equal to zero and the goes to zero in the same time the clock bit goes to 0 
i just didnt want to imply my opinion on u and wanted u to see it by ur self . i am not lazy at all thank u 
#90
rodims
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Re: TWo PIC 18f4620 , one as master & the second is slave I2C communication problem 2017/11/14 04:06:28 (permalink)
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ubuntumani just didnt want to imply my opinion on u and wanted u to see it by ur self

While this is kind of gentle in a normal conversation, it is not a good approach when you expect help in the forum.
It means that you let the others do more work than necessary. It's easier for us to tell you where you are wrong, than reviewing documentation for you and guess what you mean. It takes our time, which you like to save ...
Having  said this, you should always tell what you did, what you expect and how it actually behaved.
#91
rodims
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Re: TWo PIC 18f4620 , one as master & the second is slave I2C communication problem 2017/11/14 04:25:51 (permalink)
+2 (2)
ubuntumanIn the text they say that data bit should be ready while clock bit is 0 and before it turns to 1 then it should stay steady after the clock bit goes to 0 alittle time then the next data bit is going to be prepared same as the previous data bit one . the only data bit who goes according to that description is the ackwonledge bit the rest of data bits starts to be ready while clokc bit is equal to zero and the goes to zero in the same time the clock bit goes to 0

Not clear what you want to express and then, how this helps to solve your problem now.  The data bits must be valid at the rising clock. Did you read my proposed i2c tutorial ?
https://support.saleae.co...ter-Integrated-Circuit
Besides it's not very likely that the master's i2c hardware could not correctly transfer a byte (once started).
 
#92
ubuntuman
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Re: TWo PIC 18f4620 , one as master & the second is slave I2C communication problem 2017/11/14 04:37:18 (permalink)
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datasheet 18f4620
 The data on
the SDA pin must remain stable for that duration and
some hold time after the next falling edge of SCL

 
Do u see this in the screenshot i post above or u see this only in the screenshot of the "not ackwonledge" signal ? 
 
That is why i post the text to read it . and yes i read the tutorial u post before in the page 1 of the forum 
post edited by ubuntuman - 2017/11/14 04:40:22
#93
Jerry Messina
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Re: TWo PIC 18f4620 , one as master & the second is slave I2C communication problem 2017/11/14 04:40:19 (permalink)
+2 (2)
Just fyi... in all the slaves I've done using the MSSP I've never had to "shift the address byte".
 
If your master is sending 0x30 as the slave address (R/W_ = 0), then load 0x30 into the slave SSPADD reg.
Remember bit 0 is the R/W_ bit, so keep it cleared.
 
Also, if you're using the General Call address make sure you're not falling into this trap http://www.microchip.com/forums/m595338.aspx
 
#94
ubuntuman
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Re: TWo PIC 18f4620 , one as master & the second is slave I2C communication problem 2017/11/14 04:43:08 (permalink)
+1 (1)
Jerry Messina
Just fyi... in all the slaves I've done using the MSSP I've never had to "shift the address byte".
 
If your master is sending 0x30 as the slave address (R/W_ = 0), then load 0x30 into the slave SSPADD reg.
Remember bit 0 is the R/W_ bit, so keep it cleared.
 
Also, if you're using the General Call address make sure you're not falling into this trap http://www.microchip.com/forums/m595338.aspx
 


I agree with u , but it was a suggestion from the guys , i tried it out but it didnt work neither  
#95
DarioG
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Re: TWo PIC 18f4620 , one as master & the second is slave I2C communication problem 2017/11/14 04:50:35 (permalink)
+1 (1)
Just took a quick look at a dsPIC I'm using these days and... it seems that the address loaded into Slave's address register must be the "real" one, while Master will send it shifted along with the r/w bit...

GENOVA :D :D ! GODO
#96
ubuntuman
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Re: TWo PIC 18f4620 , one as master & the second is slave I2C communication problem 2017/11/14 04:52:11 (permalink)
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17.4.10 I2C MASTER MODE TRANSMISSION
The data on
the SDA pin must remain stable for that duration and
some hold time after the next falling edge of SCL. After
the eighth bit is shifted out (the falling edge of the eighth
clock), the BF flag is cleared and the master releases
SDA.

this first screen for the "not ack" signal https://imgur.com/T8R74GL
 
this screen for one of the data signal https://imgur.com/HcRLZ1a
 
 Do u see this in the screenshot i post above or u see this only in the screenshot of the "not ackwonledge" signal ? 
                                            hell NO 
 
#97
rodims
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Re: TWo PIC 18f4620 , one as master & the second is slave I2C communication problem 2017/11/14 04:56:38 (permalink)
+1 (1)
DarioJust took a quick look at a dsPIC I'm using these days and... it seems that the address loaded into Slave's address register must be the "real" one, while Master will send it shifted along with the r/w bit...

That's what I do with two PIC24FJ256GB406 (master and slave) (and its working).
I think Jerry did not really say something different, but it could be misunderstood.
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ubuntuman
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Re: TWo PIC 18f4620 , one as master & the second is slave I2C communication problem 2017/11/14 05:00:12 (permalink)
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rodims
DarioJust took a quick look at a dsPIC I'm using these days and... it seems that the address loaded into Slave's address register must be the "real" one, while Master will send it shifted along with the r/w bit...

That's what I do with two PIC24FJ256GB406 (master and slave) (and its working).
I think Jerry did not really say something different, but it could be misunderstood.


He says to put 0x18 in master and 0x18 in slave not 0x30 in master and 0x18 in slave 
#99
DarioG
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Re: TWo PIC 18f4620 , one as master & the second is slave I2C communication problem 2017/11/14 05:01:22 (permalink)
+1 (1)
ubuntuman
 
He says to put 0x18 in master and 0x18 in slave not 0x30 in master and 0x18 in slave 




Yep, while we say put 0x30 in master and 0x18 in slave :)

GENOVA :D :D ! GODO
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