Helpful ReplyHot!dsPIC33EV micro controller ECAN CiTRmnCON Register

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eaoiyrioeaf
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2017/08/10 05:06:43 (permalink)
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dsPIC33EV micro controller ECAN CiTRmnCON Register

There is a TXENm: TX/RX Buffer Selection bit in this register, which according to the Spec is used the determining whether the TX Buffer is a transmit buffer or a receive buffer.  
Since the TX buffer is linked by the DMA to ECAN module, and the direction is Read from DPSRAM (or RAM) address, write to ECAN CiTXD register.
 
I quite don't understand why still possible to set the buffer to receive? and If the program do set the buffer to receive, how and where the buffer can receive ECAN module?
post edited by eaoiyrioeaf - 2017/08/10 17:51:10
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eaoiyrioeaf
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Re: dsPIC33EV micro controller ECAN CiTRmnCON Register 2017/08/10 17:48:53 (permalink)
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Could any one help please?
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CinziaG
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Re: dsPIC33EV micro controller ECAN CiTRmnCON Register 2017/08/11 02:11:45 (permalink)
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I've been using PIC24EP512GU810, which seems to have a similar if not identical CAN module:
it's still complicated to me Smile but more or less by that bit you choose if that buffer will be for Transmit or for Receive.
Now I am not sure if you're using DMA in your application, as I did after suggestion by the AN: in this case, you allocate buffers in DMA space and therefore you will receive messages in the slot defined by the "filter" in your CAN setting, i.e. every messages matching Sid and filter gets automatically stored into its slot.
Similarly, when you transmit, the data are taken from DMA area as set in the TX configuration and transmitted out.
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eaoiyrioeaf
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Re: dsPIC33EV micro controller ECAN CiTRmnCON Register 2017/08/11 03:58:53 (permalink)
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Hi CinziaG,
I actually understood the mechanism you talking above, what I'm looking for is to understand the functionality of this register bit. Anyway, thank you for the advise!
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CinziaG
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Re: dsPIC33EV micro controller ECAN CiTRmnCON Register 2017/08/11 04:20:46 (permalink)
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I'd say: "if it's set for transmit, it won't be used for receiving, and viceversa"
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vjasinski
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Re: dsPIC33EV micro controller ECAN CiTRmnCON Register 2017/08/11 05:05:58 (permalink) ☄ Helpfulby eaoiyrioeaf 2017/08/13 03:32:23
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I'm using the dsPIC33F and PIC24E, i believe they work the same as yours.
In my case, the ECAN module contains up to 32 buffers, and buffers 0..7 may be configured for transmit or receive. buffers 8..31 are receive only.
You decide if buffers 0..7 are transmit or receive by setting the CiTRmnCON register appropriately.
If you configure the buffer for transmit, it is a transmit buffer, and vice-versa.
You configure the number of buffers and the FIFO starting buffer in the FiCTRL register.
Here is the code I use to effect this, setting up 16 buffers with the FIFO starting at buffer number 4.
 
// Configure the message buffers

    C1FCTRLbits.DMABS=0b100 //code for total 16 buffers
    C1FCTRLbits.FSA=4; // FIFO start buffer #

// Configure the TX/RX buffers 0..3 as transmit, no RTR
    C1TR01CON = 0x8080;
    C1TR23CON = 0x8080;
    C1TR45CON = 0x0000;
    C1TR67CON = 0x0000;

Of course, your have assigned space for you buffers accordingly.
ECAN is somewhat difficult to setup, but works great once you have it working.
Vince
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eaoiyrioeaf
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Re: dsPIC33EV micro controller ECAN CiTRmnCON Register 2017/08/13 01:38:49 (permalink)
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vjasinski
I'm using the dsPIC33F and PIC24E, i believe they work the same as yours.
In my case, the ECAN module contains up to 32 buffers, and buffers 0..7 may be configured for transmit or receive. buffers 8..31 are receive only.
You decide if buffers 0..7 are transmit or receive by setting the CiTRmnCON register appropriately.
If you configure the buffer for transmit, it is a transmit buffer, and vice-versa.
You configure the number of buffers and the FIFO starting buffer in the FiCTRL register.
Here is the code I use to effect this, setting up 16 buffers with the FIFO starting at buffer number 4.
 
// Configure the message buffers

    C1FCTRLbits.DMABS=0b100 //code for total 16 buffers
    C1FCTRLbits.FSA=4; // FIFO start buffer #

// Configure the TX/RX buffers 0..3 as transmit, no RTR
    C1TR01CON = 0x8080;
    C1TR23CON = 0x8080;
    C1TR45CON = 0x0000;
    C1TR67CON = 0x0000;

Of course, your have assigned space for you buffers accordingly.
ECAN is somewhat difficult to setup, but works great once you have it working.
Vince




Well, In your case you have shared the same buffer area for CAN TX and RX. Since the TX and RX are linked by separate DMA channel, it's not necessary to use the same buffer for TX and RX, right? and I do not find any statement in the Manual declared that the CAN TX and RX have to use the same buffer. 
In my case I have assigned different buffer for CAN TX and RX, that bring me this question.
#7
CinziaG
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Re: dsPIC33EV micro controller ECAN CiTRmnCON Register 2017/08/13 01:45:15 (permalink) ☄ Helpfulby eaoiyrioeaf 2017/08/13 03:32:11
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I tried assigning different buffers for TX and RX and it did not work... so I reverted to the other method
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eaoiyrioeaf
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Re: dsPIC33EV micro controller ECAN CiTRmnCON Register 2017/08/13 02:06:22 (permalink)
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CinziaG
I tried assigning different buffers for TX and RX and it did not work... so I reverted to the other method




Oh, I have verified my code with the same buffer, it works. Now I want to use separate buffer to make the code easy for maintain, are you sure it cannot work? if so I need to revert my code back.
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CinziaG
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Re: dsPIC33EV micro controller ECAN CiTRmnCON Register 2017/08/13 02:28:14 (permalink)
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I am not sure, I tried that for the same reasons as yours but...
Maybe I should have spent more time digging Smile
 
In the end, everything is good enough with my 32buffers, 8 suitable for transmitting and the rest for receiving, using flags etc as above.
And the DMA errata of course, at least on my PIC!
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eaoiyrioeaf
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Re: dsPIC33EV micro controller ECAN CiTRmnCON Register 2017/08/13 03:31:51 (permalink)
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Hi CinziaG,
Maybe I will try my code to see whether it is possible to separate the RX TX buffer.
Thank you very much!
 
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