You have something else wrong.
Using MPLABX v5.35 this is the syntax that works for me:
;*******************************************************************************
; *
; Microchip licenses this software to you solely for use with Microchip *
; products. The software is owned by Microchip and/or its licensors, and is *
; protected under applicable copyright laws. All rights reserved. *
; *
; This software and any accompanying information is for suggestion only. *
; It shall not be deemed to modify Microchip?s standard warranty for its *
; products. It is your responsibility to ensure that this software meets *
; your requirements. *
; *
; SOFTWARE IS PROVIDED "AS IS". MICROCHIP AND ITS LICENSORS EXPRESSLY *
; DISCLAIM ANY WARRANTY OF ANY KIND, WHETHER EXPRESS OR IMPLIED, INCLUDING *
; BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS *
; FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. IN NO EVENT SHALL *
; MICROCHIP OR ITS LICENSORS BE LIABLE FOR ANY INCIDENTAL, SPECIAL, *
; INDIRECT OR CONSEQUENTIAL DAMAGES, LOST PROFITS OR LOST DATA, HARM TO *
; YOUR EQUIPMENT, COST OF PROCUREMENT OF SUBSTITUTE GOODS, TECHNOLOGY OR *
; SERVICES, ANY CLAIMS BY THIRD PARTIES (INCLUDING BUT NOT LIMITED TO ANY *
; DEFENSE THEREOF), ANY CLAIMS FOR INDEMNITY OR CONTRIBUTION, OR OTHER *
; SIMILAR COSTS. *
; *
; To the fullest extend allowed by law, Microchip and its licensors *
; liability shall not exceed the amount of fee, if any, that you have paid *
; directly to Microchip to use this software. *
; *
; MICROCHIP PROVIDES THIS SOFTWARE CONDITIONALLY UPON YOUR ACCEPTANCE OF *
; THESE TERMS. *
; *
;*******************************************************************************
; *
; Filename: *
; Date: *
; File Version: *
; Author: *
; Company: *
; Description: *
; *
;*******************************************************************************
; *
; Notes: In the MPLAB X Help, refer to the MPASM Assembler documentation *
; for information on assembly instructions. *
; *
;*******************************************************************************
; *
; Known Issues: This template is designed for relocatable code. As such, *
; build errors such as "Directive only allowed when generating an object *
; file" will result when the 'Build in Absolute Mode' checkbox is selected *
; in the project properties. Designing code in absolute mode is *
; antiquated - use relocatable mode. *
; *
;*******************************************************************************
; *
; Revision History: *
; *
;*******************************************************************************
;*******************************************************************************
; Processor Inclusion
;
; TODO Step #1 Open the task list under Window > Tasks. Include your
; device .inc file - e.g. #include <device_name>.inc. Available
; include files are in C:\Program Files\Microchip\MPLABX\mpasmx
; assuming the default installation path for MPLAB X. You may manually find
; the appropriate include file for your device here and include it, or
; simply copy the include generated by the configuration bits
; generator (see Step #2).
;
;*******************************************************************************
#include "p18f27q84.inc"
;*******************************************************************************
;
; TODO Step #2 - Configuration Word Setup
;
; The 'CONFIG' directive is used to embed the configuration word within the
; .asm file. MPLAB X requires users to embed their configuration words
; into source code. See the device datasheet for additional information
; on configuration word settings. Device configuration bits descriptions
; are in C:\Program Files\Microchip\MPLABX\mpasmx\P<device_name>.inc
; (may change depending on your MPLAB X installation directory).
;
; MPLAB X has a feature which generates configuration bits source code. Go to
; Window > PIC Memory Views > Configuration Bits. Configure each field as
; needed and select 'Generate Source Code to Output'. The resulting code which
; appears in the 'Output Window' > 'Config Bits Source' tab may be copied
; below.
;
;*******************************************************************************
; PIC18F27Q84 Configuration Bit Settings
; Assembly source line config statements
; CONFIG1
CONFIG FEXTOSC = OFF ; External Oscillator Selection (Oscillator not enabled)
CONFIG RSTOSC = HFINTOSC_64MHZ; Reset Oscillator Selection (HFINTOSC with HFFRQ = 64 MHz and CDIV = 1:1)
; CONFIG2
CONFIG CLKOUTEN = OFF ; Clock out Enable bit (CLKOUT function is disabled)
CONFIG PR1WAY = OFF ; PRLOCKED One-Way Set Enable bit (PRLOCKED bit can be set and cleared repeatedly)
CONFIG CSWEN = ON ; Clock Switch Enable bit (Writing to NOSC and NDIV is allowed)
CONFIG JTAGEN = OFF ; JTAG Enable bit (Disable JTAG Boundary Scan mode, JTAG pins revert to user functions)
CONFIG FCMEN = ON ; Fail-Safe Clock Monitor Enable bit (Fail-Safe Clock Monitor enabled)
CONFIG FCMENP = ON ; Fail-Safe Clock Monitor -Primary XTAL Enable bit (FSCM timer will set FSCMP bit and OSFIF interrupt on Primary XTAL failure)
CONFIG FCMENS = ON ; Fail-Safe Clock Monitor -Secondary XTAL Enable bit (FSCM timer will set FSCMS bit and OSFIF interrupt on Secondary XTAL failure)
; CONFIG3
CONFIG MCLRE = EXTMCLR ; MCLR Enable bit (If LVP = 0, MCLR pin is MCLR; If LVP = 1, RE3 pin function is MCLR )
CONFIG PWRTS = PWRT_OFF ; Power-up timer selection bits (PWRT is disabled)
CONFIG MVECEN = ON ; Multi-vector enable bit (Multi-vector enabled, Vector table used for interrupts)
CONFIG IVT1WAY = OFF ; IVTLOCK bit One-way set enable bit (IVTLOCKED bit can be cleared and set repeatedly)
CONFIG LPBOREN = OFF ; Low Power BOR Enable bit (Low-Power BOR disabled)
CONFIG BOREN = SBORDIS ; Brown-out Reset Enable bits (Brown-out Reset enabled , SBOREN bit is ignored)
; CONFIG4
CONFIG BORV = VBOR_1P9 ; Brown-out Reset Voltage Selection bits (Brown-out Reset Voltage (VBOR) set to 1.9V)
CONFIG ZCD = OFF ; ZCD Disable bit (ZCD module is disabled. ZCD can be enabled by setting the ZCDSEN bit of ZCDCON)
CONFIG PPS1WAY = OFF ; PPSLOCK bit One-Way Set Enable bit (PPSLOCKED bit can be set and cleared repeatedly (subject to the unlock sequence))
CONFIG STVREN = ON ; Stack Full/Underflow Reset Enable bit (Stack full/underflow will cause Reset)
CONFIG LVP = ON ; Low Voltage Programming Enable bit (Low voltage programming enabled. MCLR/VPP pin function is MCLR. MCLRE configuration bit is ignored)
CONFIG XINST = OFF ; Extended Instruction Set Enable bit (Extended Instruction Set and Indexed Addressing Mode disabled)
; CONFIG5
CONFIG WDTCPS = WDTCPS_31 ; WDT Period selection bits (Divider ratio 1:65536; software control of WDTPS)
CONFIG WDTE = OFF ; WDT operating mode (WDT Disabled; SWDTEN is ignored)
; CONFIG6
CONFIG WDTCWS = WDTCWS_7 ; WDT Window Select bits (window always open (100%); software control; keyed access not required)
CONFIG WDTCCS = SC ; WDT input clock selector (Software Control)
; CONFIG7
CONFIG BBSIZE = BBSIZE_512 ; Boot Block Size selection bits (Boot Block size is 512 words)
CONFIG BBEN = OFF ; Boot Block enable bit (Boot block disabled)
CONFIG SAFEN = OFF ; Storage Area Flash enable bit (SAF disabled)
; CONFIG8
CONFIG WRTB = OFF ; Boot Block Write Protection bit (Boot Block not Write protected)
CONFIG WRTC = OFF ; Configuration Register Write Protection bit (Configuration registers not Write protected)
CONFIG WRTD = OFF ; Data EEPROM Write Protection bit (Data EEPROM not Write protected)
CONFIG WRTSAF = OFF ; SAF Write protection bit (SAF not Write Protected)
CONFIG WRTAPP = OFF ; Application Block write protection bit (Application Block not write protected)
; CONFIG9
CONFIG BOOTPINSEL = RC5 ; CRC on boot output pin selection (CRC on boot output pin is RC5)
CONFIG BPEN = OFF ; CRC on boot output pin enable bit (CRC on boot output pin disabled)
CONFIG ODCON = OFF ; CRC on boot output pin open drain bit (Pin drives both high-going and low-going signals)
; CONFIG10
CONFIG CP = OFF ; PFM and Data EEPROM Code Protection bit (PFM and Data EEPROM code protection disabled)
; CONFIG11
CONFIG BOOTSCEN = OFF ; CRC on boot scan enable for boot area (CRC on boot will not include the boot area of program memory in its calculation)
CONFIG BOOTCOE = HALT ; CRC on boot Continue on Error for boot areas bit (CRC on boot will stop device if error is detected in boot areas)
CONFIG APPSCEN = OFF ; CRC on boot application code scan enable (CRC on boot will not include the application area of program memory in its calculation)
CONFIG SAFSCEN = OFF ; CRC on boot SAF area scan enable (CRC on boot will not include the SAF area of program memory in its calculation)
CONFIG DATASCEN = OFF ; CRC on boot Data EEPROM scan enable (CRC on boot will not include data EEPROM in its calculation)
CONFIG CFGSCEN = OFF ; CRC on boot Config fuses scan enable (CRC on boot will not include the configuration fuses in its calculation)
CONFIG COE = HALT ; CRC on boot Continue on Error for non-boot areas bit (CRC on boot will stop device if error is detected in non-boot areas)
CONFIG BOOTPOR = OFF ; Boot on CRC Enable bit (CRC on boot will not run)
;*******************************************************************************
;
; TODO Step #3 - Variable Definitions
;
; Refer to datasheet for available data memory (RAM) organization assuming
; relocatible code organization (which is an option in project
; properties > mpasm (Global Options)). Absolute mode generally should
; be used sparingly.
;
; Example of using GPR Uninitialized Data
;
; GPR_VAR UDATA
; MYVAR1 RES 1 ; User variable linker places
; MYVAR2 RES 1 ; User variable linker places
; MYVAR3 RES 1 ; User variable linker places
;
; ; Example of using Access Uninitialized Data Section (when available)
; ; The variables for the context saving in the device datasheet may need
; ; memory reserved here.
; INT_VAR UDATA_ACS
; W_TEMP RES 1 ; w register for context saving (ACCESS)
; STATUS_TEMP RES 1 ; status used for context saving
; BSR_TEMP RES 1 ; bank select used for ISR context saving
;
;*******************************************************************************
; TODO PLACE VARIABLE DEFINITIONS GO HERE
;*******************************************************************************
; Reset Vector
;*******************************************************************************
RES_VECT CODE 0x0000 ; processor reset vector
GOTO START ; go to beginning of program
;*******************************************************************************
; TODO Step #4 - Interrupt Service Routines
;
; There are a few different ways to structure interrupt routines in the 8
; bit device families. On PIC18's the high priority and low priority
; interrupts are located at 0x0008 and 0x0018, respectively. On PIC16's and
; lower the interrupt is at 0x0004. Between device families there is subtle
; variation in the both the hardware supporting the ISR (for restoring
; interrupt context) as well as the software used to restore the context
; (without corrupting the STATUS bits).
;
; General formats are shown below in relocatible format.
;
;------------------------------PIC16's and below--------------------------------
;
; ISR CODE 0x0004 ; interrupt vector location
;
; <Search the device datasheet for 'context' and copy interrupt
; context saving code here. Older devices need context saving code,
; but newer devices like the 16F#### don't need context saving code.>
;
; RETFIE
;
;----------------------------------PIC18's--------------------------------------
;
; ISRHV CODE 0x0008
; GOTO HIGH_ISR
; ISRLV CODE 0x0018
; GOTO LOW_ISR
;
; ISRH CODE ; let linker place high ISR routine
; HIGH_ISR
; <Insert High Priority ISR Here - no SW context saving>
; RETFIE FAST
;
; ISRL CODE ; let linker place low ISR routine
; LOW_ISR
; <Search the device datasheet for 'context' and copy interrupt
; context saving code here>
; RETFIE
;
;*******************************************************************************
; TODO INSERT ISR HERE
;*******************************************************************************
; MAIN PROGRAM
;*******************************************************************************
MAIN_PROG CODE ; let linker place main program
START
; TODO Step #5 - Insert Your Program Here
MOVLW 0x55 ; your instructions
GOTO $ ; loop forever
END